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authorNicolai Haehnle <nhaehnle@gmail.com>2018-03-19 14:14:20 +0000
committerNicolai Haehnle <nhaehnle@gmail.com>2018-03-19 14:14:20 +0000
commit4186cc7c08b2c1cdd7f7a583fa728e065b5be033 (patch)
tree7dc97c873ec1ac33733e867a70308de8e0f52f81 /llvm/lib/Target/SystemZ
parent18f1998a00492bb70de37aaab4441ea9cea306f5 (diff)
downloadbcm5719-llvm-4186cc7c08b2c1cdd7f7a583fa728e065b5be033.tar.gz
bcm5719-llvm-4186cc7c08b2c1cdd7f7a583fa728e065b5be033.zip
TableGen: Check the dynamic type of !cast<Rec>(string)
Summary: The docs already claim that this happens, but so far it hasn't. As a consequence, existing TableGen files get this wrong a lot, but luckily the fixes are all reasonably straightforward. To make this work with all the existing forms of self-references (since the true type of a record is only built up over time), the lookup of self-references in !cast is delayed until the final resolving step. Change-Id: If5923a72a252ba2fbc81a889d59775df0ef31164 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D44475 llvm-svn: 327849
Diffstat (limited to 'llvm/lib/Target/SystemZ')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZOperands.td12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZOperands.td b/llvm/lib/Target/SystemZ/SystemZOperands.td
index 713612129d9..8171eae6460 100644
--- a/llvm/lib/Target/SystemZ/SystemZOperands.td
+++ b/llvm/lib/Target/SystemZ/SystemZOperands.td
@@ -115,13 +115,13 @@ class AddressingMode<string seltype, string bitsize, string dispsize,
class BDMode<string type, string bitsize, string dispsize, string suffix>
: AddressingMode<type, bitsize, dispsize, suffix, "", 2, "BDAddr",
(ops !cast<RegisterOperand>("ADDR"##bitsize),
- !cast<Immediate>("disp"##dispsize##"imm"##bitsize))>;
+ !cast<Operand>("disp"##dispsize##"imm"##bitsize))>;
// An addressing mode with a base, displacement and index.
class BDXMode<string type, string bitsize, string dispsize, string suffix>
: AddressingMode<type, bitsize, dispsize, suffix, "", 3, "BDXAddr",
(ops !cast<RegisterOperand>("ADDR"##bitsize),
- !cast<Immediate>("disp"##dispsize##"imm"##bitsize),
+ !cast<Operand>("disp"##dispsize##"imm"##bitsize),
!cast<RegisterOperand>("ADDR"##bitsize))>;
// A BDMode paired with an immediate length operand of LENSIZE bits.
@@ -130,21 +130,21 @@ class BDLMode<string type, string bitsize, string dispsize, string suffix,
: AddressingMode<type, bitsize, dispsize, suffix, "Len"##lensize, 3,
"BDLAddr",
(ops !cast<RegisterOperand>("ADDR"##bitsize),
- !cast<Immediate>("disp"##dispsize##"imm"##bitsize),
- !cast<Immediate>("imm"##bitsize))>;
+ !cast<Operand>("disp"##dispsize##"imm"##bitsize),
+ !cast<Operand>("imm"##bitsize))>;
// A BDMode paired with a register length operand.
class BDRMode<string type, string bitsize, string dispsize, string suffix>
: AddressingMode<type, bitsize, dispsize, suffix, "", 3, "BDRAddr",
(ops !cast<RegisterOperand>("ADDR"##bitsize),
- !cast<Immediate>("disp"##dispsize##"imm"##bitsize),
+ !cast<Operand>("disp"##dispsize##"imm"##bitsize),
!cast<RegisterOperand>("GR"##bitsize))>;
// An addressing mode with a base, displacement and a vector index.
class BDVMode<string bitsize, string dispsize>
: AddressOperand<bitsize, dispsize, "", "BDVAddr",
(ops !cast<RegisterOperand>("ADDR"##bitsize),
- !cast<Immediate>("disp"##dispsize##"imm"##bitsize),
+ !cast<Operand>("disp"##dispsize##"imm"##bitsize),
!cast<RegisterOperand>("VR128"))>;
//===----------------------------------------------------------------------===//
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