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| author | Evan Cheng <evan.cheng@apple.com> | 2011-06-24 01:44:41 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-06-24 01:44:41 +0000 |
| commit | 247533179a3e39f78e9da3c7d25093df2b87371c (patch) | |
| tree | 2e31c40e1ed74e452b2f1ff59b04e9c97b082408 /llvm/lib/Target/SystemZ | |
| parent | 44c9b3758fda7443a201d71925a5b51b1cf4aaf2 (diff) | |
| download | bcm5719-llvm-247533179a3e39f78e9da3c7d25093df2b87371c.tar.gz bcm5719-llvm-247533179a3e39f78e9da3c7d25093df2b87371c.zip | |
Starting to refactor Target to separate out code that's needed to fully describe
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.
First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.
llvm-svn: 133782
Diffstat (limited to 'llvm/lib/Target/SystemZ')
| -rw-r--r-- | llvm/lib/Target/SystemZ/CMakeLists.txt | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/SystemZ/Makefile | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp | 8 |
3 files changed, 9 insertions, 7 deletions
diff --git a/llvm/lib/Target/SystemZ/CMakeLists.txt b/llvm/lib/Target/SystemZ/CMakeLists.txt index 1f5d3552ae7..3e06109a391 100644 --- a/llvm/lib/Target/SystemZ/CMakeLists.txt +++ b/llvm/lib/Target/SystemZ/CMakeLists.txt @@ -1,8 +1,9 @@ set(LLVM_TARGET_DEFINITIONS SystemZ.td) -tablegen(SystemZGenRegisterInfo.h.inc -gen-register-desc-header) tablegen(SystemZGenRegisterNames.inc -gen-register-enums) -tablegen(SystemZGenRegisterInfo.inc -gen-register-desc) +tablegen(SystemZGenRegisterDesc.inc -gen-register-desc) +tablegen(SystemZGenRegisterInfo.h.inc -gen-register-info-header) +tablegen(SystemZGenRegisterInfo.inc -gen-register-info) tablegen(SystemZGenInstrNames.inc -gen-instr-enums) tablegen(SystemZGenInstrInfo.inc -gen-instr-desc) tablegen(SystemZGenAsmWriter.inc -gen-asm-writer) diff --git a/llvm/lib/Target/SystemZ/Makefile b/llvm/lib/Target/SystemZ/Makefile index 6930e14c061..24817152fb0 100644 --- a/llvm/lib/Target/SystemZ/Makefile +++ b/llvm/lib/Target/SystemZ/Makefile @@ -13,7 +13,8 @@ TARGET = SystemZ # Make sure that tblgen is run, first thing. BUILT_SOURCES = SystemZGenRegisterInfo.h.inc SystemZGenRegisterNames.inc \ - SystemZGenRegisterInfo.inc SystemZGenInstrNames.inc \ + SystemZGenRegisterInfo.inc SystemZGenRegisterDesc.inc \ + SystemZGenInstrNames.inc \ SystemZGenInstrInfo.inc SystemZGenAsmWriter.inc \ SystemZGenDAGISel.inc SystemZGenSubtarget.inc SystemZGenCallingConv.inc diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp index d5c165f640e..a587e1c2895 100644 --- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp @@ -25,11 +25,14 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOptions.h" #include "llvm/ADT/BitVector.h" +#include "SystemZGenRegisterDesc.inc" +#include "SystemZGenRegisterInfo.inc" using namespace llvm; SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm, const SystemZInstrInfo &tii) - : SystemZGenRegisterInfo(SystemZ::ADJCALLSTACKUP, SystemZ::ADJCALLSTACKDOWN), + : SystemZGenRegisterInfo(SystemZRegDesc, SystemZRegInfoDesc, + SystemZ::ADJCALLSTACKUP, SystemZ::ADJCALLSTACKDOWN), TM(tm), TII(tii) { } @@ -153,6 +156,3 @@ int SystemZRegisterInfo::getLLVMRegNum(unsigned DwarfRegNo, bool isEH) const { assert(0 && "What is the dwarf register number"); return -1; } - - -#include "SystemZGenRegisterInfo.inc" |
