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authorDorit Nuzman <dorit.nuzman@intel.com>2018-10-31 09:57:56 +0000
committerDorit Nuzman <dorit.nuzman@intel.com>2018-10-31 09:57:56 +0000
commit34da6dd696439e195e7b650d97a95913101a88d9 (patch)
treea718d6a89ceb39ada3675f96f8de45c051e8ce7f /llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
parent889356eb719ded45c708514fb03777f705eb5934 (diff)
downloadbcm5719-llvm-34da6dd696439e195e7b650d97a95913101a88d9.tar.gz
bcm5719-llvm-34da6dd696439e195e7b650d97a95913101a88d9.zip
[LV] Support vectorization of interleave-groups that require an epilog under
optsize using masked wide loads Under Opt for Size, the vectorizer does not vectorize interleave-groups that have gaps at the end of the group (such as a loop that reads only the even elements: a[2*i]) because that implies that we'll require a scalar epilogue (which is not allowed under Opt for Size). This patch extends the support for masked-interleave-groups (introduced by D53011 for conditional accesses) to also cover the case of gaps in a group of loads; Targets that enable the masked-interleave-group feature don't have to invalidate interleave-groups of loads with gaps; they could now use masked wide-loads and shuffles (if that's what the cost model selects). Reviewers: Ayal, hsaito, dcaballe, fhahn Reviewed By: Ayal Differential Revision: https://reviews.llvm.org/D53668 llvm-svn: 345705
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp8
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
index caa3f597445..94db56e3738 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
@@ -969,10 +969,12 @@ int SystemZTTIImpl::getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
ArrayRef<unsigned> Indices,
unsigned Alignment,
unsigned AddressSpace,
- bool IsMasked) {
- if (IsMasked)
+ bool UseMaskForCond,
+ bool UseMaskForGaps) {
+ if (UseMaskForCond || UseMaskForGaps)
return BaseT::getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
- Alignment, AddressSpace, IsMasked);
+ Alignment, AddressSpace,
+ UseMaskForCond, UseMaskForGaps);
assert(isa<VectorType>(VecTy) &&
"Expect a vector type for interleaved memory op");
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