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authorJonas Paulsson <paulsson@linux.vnet.ibm.com>2016-10-20 08:27:16 +0000
committerJonas Paulsson <paulsson@linux.vnet.ibm.com>2016-10-20 08:27:16 +0000
commit8010b631d5888ba8e2351d14f41fac08c7539117 (patch)
treec07f4143db06252f975b8e10f46714dcfb8e5ed4 /llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
parent6912147094f36892ff37e5c047cdfa416cc611ea (diff)
downloadbcm5719-llvm-8010b631d5888ba8e2351d14f41fac08c7539117.tar.gz
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[SystemZ] Post-RA scheduler implementation
Post-RA sched strategy and scheduling instruction annotations for z196, zEC12 and z13. This scheduler optimizes decoder grouping and balances processor resources (including side steering the FPd unit instructions). The SystemZHazardRecognizer keeps track of the scheduling state, which can be dumped with -debug-only=misched. Reviers: Ulrich Weigand, Andrew Trick. https://reviews.llvm.org/D17260 llvm-svn: 284704
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp16
1 files changed, 9 insertions, 7 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
index ceb79f7e774..4d60ab7e8d4 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -9,6 +9,7 @@
#include "SystemZTargetMachine.h"
#include "SystemZTargetTransformInfo.h"
+#include "SystemZMachineScheduler.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/Support/TargetRegistry.h"
@@ -17,7 +18,6 @@
using namespace llvm;
-extern cl::opt<bool> MISchedPostRA;
extern "C" void LLVMInitializeSystemZTarget() {
// Register the target.
RegisterTargetMachine<SystemZTargetMachine> X(getTheSystemZTarget());
@@ -114,6 +114,12 @@ public:
return getTM<SystemZTargetMachine>();
}
+ ScheduleDAGInstrs *
+ createPostMachineScheduler(MachineSchedContext *C) const override {
+ return new ScheduleDAGMI(C, make_unique<SystemZPostRASchedStrategy>(C),
+ /*IsPostRA=*/true);
+ }
+
void addIRPasses() override;
bool addInstSelector() override;
void addPreSched2() override;
@@ -180,12 +186,8 @@ void SystemZPassConfig::addPreEmitPass() {
// Do final scheduling after all other optimizations, to get an
// optimal input for the decoder (branch relaxation must happen
// after block placement).
- if (getOptLevel() != CodeGenOpt::None) {
- if (MISchedPostRA)
- addPass(&PostMachineSchedulerID);
- else
- addPass(&PostRASchedulerID);
- }
+ if (getOptLevel() != CodeGenOpt::None)
+ addPass(&PostMachineSchedulerID);
}
TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) {
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