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| author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-04-27 14:09:03 +0000 |
|---|---|---|
| committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-04-27 14:09:03 +0000 |
| commit | 9a485985cd2817d21c8a996a1d973411aab55ab9 (patch) | |
| tree | 8a0135a126c228bc47871c2f5b30e168bf3442cd /llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td | |
| parent | 2fcee8bd52dd768f108656422a88e5a5fa3ed5b3 (diff) | |
| download | bcm5719-llvm-9a485985cd2817d21c8a996a1d973411aab55ab9.tar.gz bcm5719-llvm-9a485985cd2817d21c8a996a1d973411aab55ab9.zip | |
[SystemZ] Remove scheduling info from some Pseudo instructions (NFC).
If the MachineInstr uses a custom inserter and is then erased after
instruction selection, there is no use for mapping it to a sched class.
Review: Ulrich Weigand
llvm-svn: 331040
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td | 35 |
1 files changed, 4 insertions, 31 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td b/llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td index d8047a72337..29e4742d4a3 100644 --- a/llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td +++ b/llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td @@ -134,21 +134,6 @@ def : InstRW<[LSU_lat1, EndGroup], (instregex "Return$")>; def : InstRW<[LSU_lat1], (instregex "CondReturn$")>; //===----------------------------------------------------------------------===// -// Select instructions -//===----------------------------------------------------------------------===// - -// Select pseudo -def : InstRW<[FXU], (instregex "Select(32|64|32Mux)$")>; - -// CondStore pseudos -def : InstRW<[FXU], (instregex "CondStore16(Inv)?$")>; -def : InstRW<[FXU], (instregex "CondStore16Mux(Inv)?$")>; -def : InstRW<[FXU], (instregex "CondStore32(Inv)?$")>; -def : InstRW<[FXU], (instregex "CondStore64(Inv)?$")>; -def : InstRW<[FXU], (instregex "CondStore8(Inv)?$")>; -def : InstRW<[FXU], (instregex "CondStore8Mux(Inv)?$")>; - -//===----------------------------------------------------------------------===// // Move instructions //===----------------------------------------------------------------------===// @@ -644,7 +629,7 @@ def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "BASSM$")>; // Transaction begin def : InstRW<[LSU, LSU, FXU, FXU, FXU, FXU, FXU, Lat15, GroupAlone], - (instregex "TBEGIN(C|_nofloat)?$")>; + (instregex "TBEGIN(C)?$")>; // Transaction end def : InstRW<[LSU, GroupAlone], (instregex "TEND$")>; @@ -674,10 +659,6 @@ def : InstRW<[FXU, FXU, Lat7, GroupAlone], (instregex "FLOGR$")>; // Population count def : InstRW<[FXU, Lat3], (instregex "POPCNT$")>; -// Extend -def : InstRW<[FXU], (instregex "AEXT128$")>; -def : InstRW<[FXU], (instregex "ZEXT128$")>; - // String instructions def : InstRW<[FXU, LSU, Lat30], (instregex "SRST$")>; def : InstRW<[FXU, Lat30], (instregex "SRSTU$")>; @@ -704,14 +685,6 @@ def : InstRW<[], (instregex "Insn.*")>; // ----------------------------- Floating point ----------------------------- // //===----------------------------------------------------------------------===// -// FP: Select instructions -//===----------------------------------------------------------------------===// - -def : InstRW<[FXU], (instregex "SelectF(32|64|128)$")>; -def : InstRW<[FXU], (instregex "CondStoreF32(Inv)?$")>; -def : InstRW<[FXU], (instregex "CondStoreF64(Inv)?$")>; - -//===----------------------------------------------------------------------===// // FP: Move instructions //===----------------------------------------------------------------------===// @@ -727,11 +700,11 @@ def : InstRW<[FXU, FXU, Lat2, GroupAlone], (instregex "LXR$")>; // Load and Test def : InstRW<[FPU], (instregex "LT(D|E)BR$")>; -def : InstRW<[FPU], (instregex "LTEBRCompare(_VecPseudo)?$")>; -def : InstRW<[FPU], (instregex "LTDBRCompare(_VecPseudo)?$")>; +def : InstRW<[FPU], (instregex "LTEBRCompare$")>; +def : InstRW<[FPU], (instregex "LTDBRCompare$")>; def : InstRW<[FPU2, FPU2, Lat9, GroupAlone], (instregex "LTXBR$")>; def : InstRW<[FPU2, FPU2, Lat9, GroupAlone], - (instregex "LTXBRCompare(_VecPseudo)?$")>; + (instregex "LTXBRCompare$")>; // Copy sign def : InstRW<[FXU, FXU, Lat5, GroupAlone], (instregex "CPSDRd(d|s)$")>; |
