diff options
| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-01 14:41:52 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-01 14:41:52 +0000 |
| commit | 2cac763544aaf92731db80ac2420da6c39d2cb13 (patch) | |
| tree | 77b15c4ee9f4025dc6e1d84a35c3af0952698aa5 /llvm/lib/Target/SystemZ/SystemZPatterns.td | |
| parent | 1f80396d0342e70f21da8ad9bd65149abacbffc3 (diff) | |
| download | bcm5719-llvm-2cac763544aaf92731db80ac2420da6c39d2cb13.tar.gz bcm5719-llvm-2cac763544aaf92731db80ac2420da6c39d2cb13.zip | |
[SystemZ] Extend test-under-mask support to high GR32s
llvm-svn: 191773
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZPatterns.td')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZPatterns.td | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZPatterns.td b/llvm/lib/Target/SystemZ/SystemZPatterns.td index af46919569a..f3ca60b27ad 100644 --- a/llvm/lib/Target/SystemZ/SystemZPatterns.td +++ b/llvm/lib/Target/SystemZ/SystemZPatterns.td @@ -113,11 +113,11 @@ multiclass CondStores64<Instruction insn, Instruction insninv, } // INSN performs a comparison between a 32-bit register and a constant. -// Record that it is equivalent to comparing the low word of a GR64 with IMM. +// Record that it is equivalent to comparing subreg SUBREG of a GR64 with IMM. class CompareGR64RI<Instruction insn, SDPatternOperator compare, - Immediate imm> + Immediate imm, SubRegIndex subreg> : Pat<(compare GR64:$R1, imm:$I2), - (insn (EXTRACT_SUBREG GR64:$R1, subreg_l32), + (insn (EXTRACT_SUBREG GR64:$R1, subreg), (imm.OperandTransform imm:$I2))>; // Try to use MVC instruction INSN for a load of type LOAD followed by a store |
