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author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2016-11-28 13:40:08 +0000 |
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committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2016-11-28 13:40:08 +0000 |
commit | 758399131a90a15fac6a329d3f6b2f35ea006bc7 (patch) | |
tree | df566985e97bb005264c8b66d309ff7918d26055 /llvm/lib/Target/SystemZ/SystemZLongBranch.cpp | |
parent | 524f276c744e15e17e2384f03933390d1957b2dc (diff) | |
download | bcm5719-llvm-758399131a90a15fac6a329d3f6b2f35ea006bc7.tar.gz bcm5719-llvm-758399131a90a15fac6a329d3f6b2f35ea006bc7.zip |
[SystemZ] Add remaining branch instructions
This patch adds assembler support for the remaining branch instructions:
the non-relative branch on count variants, and all variants of branch
on index.
The only one of those that can be readily exploited for code generation
is BRCTH (branch on count using a high 32-bit register as count). Do
use it, however, it is necessary to also introduce a hew CHIMux pseudo
to allow comparisons of a 32-bit value agains a short immediate to go
into a high register as well (implemented via CHI/CIH).
This causes a bit of codegen changes overall, but those have proven to
be neutral (or even beneficial) in performance measurements.
llvm-svn: 288029
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZLongBranch.cpp')
-rw-r--r-- | llvm/lib/Target/SystemZ/SystemZLongBranch.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp b/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp index 0be0396034c..14ff6afbd4a 100644 --- a/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp +++ b/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp @@ -226,6 +226,10 @@ TerminatorInfo SystemZLongBranch::describeTerminator(MachineInstr &MI) { // Relaxes to A(G)HI and BRCL, which is 6 bytes longer. Terminator.ExtraRelaxSize = 6; break; + case SystemZ::BRCTH: + // Never needs to be relaxed. + Terminator.ExtraRelaxSize = 0; + break; case SystemZ::CRJ: case SystemZ::CLRJ: // Relaxes to a C(L)R/BRCL sequence, which is 2 bytes longer. |