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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 10:45:16 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-09-30 10:45:16 +0000
commitf9496060f665d9d5420fb5a93cee0c9d446f13d7 (patch)
tree4d0adcf3ad8a1791493667fe1cf4e1b66317b6e3 /llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
parent87a4436456939c6101e274db3e47e11c84a06a97 (diff)
downloadbcm5719-llvm-f9496060f665d9d5420fb5a93cee0c9d446f13d7.tar.gz
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[SystemZ] Add GRH32 for the high word of a GR64
The only thing this does on its own is make the definitions of RISB[HL]G a bit more precise. Those instructions are only used by the MC layer at the moment, so no behavioral change is intended. The class is needed by later patches though. llvm-svn: 191660
Diffstat (limited to 'llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp')
-rw-r--r--llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp b/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
index 79469b6afe2..fc7fbf98f59 100644
--- a/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
+++ b/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
@@ -66,6 +66,12 @@ static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs);
}
+static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+ uint64_t Address,
+ const void *Decoder) {
+ return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs);
+}
+
static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder) {
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