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author | Chris Lattner <sabre@nondot.org> | 2006-04-20 17:15:44 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-04-20 17:15:44 +0000 |
commit | ac611955395422dbb9d62126c778383b30604f44 (patch) | |
tree | 21b9023bcca52b5b7413b9eca8551a4dc7d5ee18 /llvm/lib/Target/SparcV9/ModuloScheduling | |
parent | 53f4499b224e6393fc9cfac5117586dbeb779d61 (diff) | |
download | bcm5719-llvm-ac611955395422dbb9d62126c778383b30604f44.tar.gz bcm5719-llvm-ac611955395422dbb9d62126c778383b30604f44.zip |
This target is no longer built. The ,v files now live in the reoptimizer.
llvm-svn: 27885
Diffstat (limited to 'llvm/lib/Target/SparcV9/ModuloScheduling')
15 files changed, 0 insertions, 10154 deletions
diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.cpp b/llvm/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.cpp deleted file mode 100644 index 9c3422d54a6..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.cpp +++ /dev/null @@ -1,305 +0,0 @@ -//===-- DependenceAnalyzer.cpp - DependenceAnalyzer ------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// -// -// -//===----------------------------------------------------------------------===// -#define DEBUG_TYPE "ModuloSched" - -#include "DependenceAnalyzer.h" -#include "llvm/Type.h" -#include "llvm/Support/Debug.h" -#include "llvm/ADT/Statistic.h" -#include "llvm/Constants.h" -#include <iostream> -using namespace llvm; - -namespace llvm { - - /// Create ModuloSchedulingPass - FunctionPass *createDependenceAnalyzer() { - return new DependenceAnalyzer(); - } -} - -Statistic<> NoDeps("depanalyzer-nodeps", "Number of dependences eliminated"); -Statistic<> NumDeps("depanalyzer-deps", - "Number of dependences could not eliminate"); -Statistic<> AdvDeps("depanalyzer-advdeps", - "Number of dependences using advanced techniques"); - -bool DependenceAnalyzer::runOnFunction(Function &F) { - AA = &getAnalysis<AliasAnalysis>(); - TD = &getAnalysis<TargetData>(); - SE = &getAnalysis<ScalarEvolution>(); - - return false; -} - -static RegisterAnalysis<DependenceAnalyzer>X("depanalyzer", - "Dependence Analyzer"); - -// - Get inter and intra dependences between loads and stores -// -// Overview of Method: -// Step 1: Use alias analysis to determine dependencies if values are loop -// invariant -// Step 2: If pointers are not GEP, then there is a dependence. -// Step 3: Compare GEP base pointers with AA. If no alias, no dependence. -// If may alias, then add a dependence. If must alias, then analyze -// further (Step 4) -// Step 4: do advanced analysis -void DependenceAnalyzer::AnalyzeDeps(Value *val, Value *val2, bool valLoad, - bool val2Load, - std::vector<Dependence> &deps, - BasicBlock *BB, - bool srcBeforeDest) { - - bool loopInvariant = true; - - //Check if both are instructions and prove not loop invariant if possible - if(Instruction *valInst = dyn_cast<Instruction>(val)) - if(valInst->getParent() == BB) - loopInvariant = false; - if(Instruction *val2Inst = dyn_cast<Instruction>(val2)) - if(val2Inst->getParent() == BB) - loopInvariant = false; - - - //If Loop invariant, let AA decide - if(loopInvariant) { - if(AA->alias(val, (unsigned)TD->getTypeSize(val->getType()), - val2,(unsigned)TD->getTypeSize(val2->getType())) - != AliasAnalysis::NoAlias) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - } - else - ++NoDeps; - return; - } - - //Otherwise, continue with step 2 - - GetElementPtrInst *GP = dyn_cast<GetElementPtrInst>(val); - GetElementPtrInst *GP2 = dyn_cast<GetElementPtrInst>(val2); - - //If both are not GP instructions, we can not do further analysis - if(!GP || !GP2) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - return; - } - - - //Otherwise, compare GEP bases (op #0) with Alias Analysis - - Value *GPop = GP->getOperand(0); - Value *GP2op = GP2->getOperand(0); - int alias = AA->alias(GPop, (unsigned)TD->getTypeSize(GPop->getType()), - GP2op,(unsigned)TD->getTypeSize(GP2op->getType())); - - - if(alias == AliasAnalysis::MustAlias) { - //Further dep analysis to do - advancedDepAnalysis(GP, GP2, valLoad, val2Load, deps, srcBeforeDest); - ++AdvDeps; - } - else if(alias == AliasAnalysis::MayAlias) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - } - //Otherwise no dependence since there is no alias - else - ++NoDeps; -} - - -// advancedDepAnalysis - Do advanced data dependence tests -void DependenceAnalyzer::advancedDepAnalysis(GetElementPtrInst *gp1, - GetElementPtrInst *gp2, - bool valLoad, - bool val2Load, - std::vector<Dependence> &deps, - bool srcBeforeDest) { - - //Check if both GEPs are in a simple form: 3 ops, constant 0 as second arg - if(gp1->getNumOperands() != 3 || gp2->getNumOperands() != 3) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - return; - } - - //Check second arg is constant 0 - bool GPok = false; - if(Constant *c1 = dyn_cast<Constant>(gp1->getOperand(1))) - if(Constant *c2 = dyn_cast<Constant>(gp2->getOperand(1))) - if(c1->isNullValue() && c2->isNullValue()) - GPok = true; - - if(!GPok) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - return; - - } - - Value *Gep1Idx = gp1->getOperand(2); - Value *Gep2Idx = gp2->getOperand(2); - - if(CastInst *c1 = dyn_cast<CastInst>(Gep1Idx)) - Gep1Idx = c1->getOperand(0); - if(CastInst *c2 = dyn_cast<CastInst>(Gep2Idx)) - Gep2Idx = c2->getOperand(0); - - //Get SCEV for each index into the area - SCEVHandle SV1 = SE->getSCEV(Gep1Idx); - SCEVHandle SV2 = SE->getSCEV(Gep2Idx); - - //Now handle special cases of dependence analysis - //SV1->print(std::cerr); - //std::cerr << "\n"; - //SV2->print(std::cerr); - //std::cerr << "\n"; - - //Check if we have an SCEVAddExpr, cause we can only handle those - SCEVAddRecExpr *SVAdd1 = dyn_cast<SCEVAddRecExpr>(SV1); - SCEVAddRecExpr *SVAdd2 = dyn_cast<SCEVAddRecExpr>(SV2); - - //Default to having a dependence since we can't analyze further - if(!SVAdd1 || !SVAdd2) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - return; - } - - //Check if not Affine, we can't handle those - if(!SVAdd1->isAffine( ) || !SVAdd2->isAffine()) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - return; - } - - //We know the SCEV is in the form A + B*x, check that B is the same for both - SCEVConstant *B1 = dyn_cast<SCEVConstant>(SVAdd1->getOperand(1)); - SCEVConstant *B2 = dyn_cast<SCEVConstant>(SVAdd2->getOperand(1)); - - if(B1->getValue() != B2->getValue()) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - return; - } - - if(B1->getValue()->getRawValue() != 1 || B2->getValue()->getRawValue() != 1) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - return; - } - - - SCEVConstant *A1 = dyn_cast<SCEVConstant>(SVAdd1->getOperand(0)); - SCEVConstant *A2 = dyn_cast<SCEVConstant>(SVAdd2->getOperand(0)); - - //Come back and deal with nested SCEV! - if(!A1 || !A2) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - return; - } - - //If equal, create dep as normal - if(A1->getValue() == A2->getValue()) { - createDep(deps, valLoad, val2Load, srcBeforeDest); - return; - } - //Eliminate a dep if this is a intra dep - else if(srcBeforeDest) { - ++NoDeps; - return; - } - - //Find constant index difference - int diff = A1->getValue()->getRawValue() - A2->getValue()->getRawValue(); - //std::cerr << diff << "\n"; - if(diff > 5) - diff = 2; - - if(diff > 0) - createDep(deps, valLoad, val2Load, srcBeforeDest, diff); - - //assert(diff > 0 && "Expected diff to be greater then 0"); -} - -// Create dependences once its determined these two instructions -// references the same memory -void DependenceAnalyzer::createDep(std::vector<Dependence> &deps, - bool valLoad, bool val2Load, - bool srcBeforeDest, int diff) { - - //If the source instruction occurs after the destination instruction - //(execution order), then this dependence is across iterations - if(!srcBeforeDest && (diff==0)) - diff = 1; - - //If load/store pair - if(valLoad && !val2Load) { - if(srcBeforeDest) - //Anti Dep - deps.push_back(Dependence(diff, Dependence::AntiDep)); - else - deps.push_back(Dependence(diff, Dependence::TrueDep)); - - ++NumDeps; - } - //If store/load pair - else if(!valLoad && val2Load) { - if(srcBeforeDest) - //True Dep - deps.push_back(Dependence(diff, Dependence::TrueDep)); - else - deps.push_back(Dependence(diff, Dependence::AntiDep)); - ++NumDeps; - } - //If store/store pair - else if(!valLoad && !val2Load) { - //True Dep - deps.push_back(Dependence(diff, Dependence::OutputDep)); - ++NumDeps; - } -} - - - -//Get Dependence Info for a pair of Instructions -DependenceResult DependenceAnalyzer::getDependenceInfo(Instruction *inst1, - Instruction *inst2, - bool srcBeforeDest) { - std::vector<Dependence> deps; - - DEBUG(std::cerr << "Inst1: " << *inst1 << "\n"); - DEBUG(std::cerr << "Inst2: " << *inst2 << "\n"); - - //No self deps - if(inst1 == inst2) - return DependenceResult(deps); - - if(LoadInst *ldInst = dyn_cast<LoadInst>(inst1)) { - - if(StoreInst *stInst = dyn_cast<StoreInst>(inst2)) - AnalyzeDeps(ldInst->getOperand(0), stInst->getOperand(1), - true, false, deps, ldInst->getParent(), srcBeforeDest); - } - else if(StoreInst *stInst = dyn_cast<StoreInst>(inst1)) { - - if(LoadInst *ldInst = dyn_cast<LoadInst>(inst2)) - AnalyzeDeps(stInst->getOperand(1), ldInst->getOperand(0), false, true, - deps, ldInst->getParent(), srcBeforeDest); - - else if(StoreInst *stInst2 = dyn_cast<StoreInst>(inst2)) - AnalyzeDeps(stInst->getOperand(1), stInst2->getOperand(1), false, false, - deps, stInst->getParent(), srcBeforeDest); - } - else - assert(0 && "Expected a load or a store\n"); - - DependenceResult dr = DependenceResult(deps); - return dr; -} - diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.h b/llvm/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.h deleted file mode 100644 index f9aac5c0101..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.h +++ /dev/null @@ -1,92 +0,0 @@ -//===-- DependenceAnalyzer.h - Dependence Analyzer--------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_DEPENDENCEANALYZER_H -#define LLVM_DEPENDENCEANALYZER_H - -#include "llvm/Instructions.h" -#include "llvm/Function.h" -#include "llvm/Pass.h" -#include "llvm/Analysis/AliasAnalysis.h" -#include "llvm/Analysis/ScalarEvolutionExpressions.h" -#include "llvm/Target/TargetData.h" -#include <vector> - -namespace llvm { - - - //class to represent a dependence - struct Dependence { - - enum DataDepType { - TrueDep, AntiDep, OutputDep, NonDateDep, - }; - - Dependence(int diff, DataDepType dep) : iteDiff(diff), depType(dep) {} - unsigned getIteDiff() { return iteDiff; } - unsigned getDepType() { return depType; } - - private: - - unsigned iteDiff; - unsigned depType; - }; - - - struct DependenceResult { - std::vector<Dependence> dependences; - DependenceResult(const std::vector<Dependence> &d) : dependences(d) {} - }; - - - class DependenceAnalyzer : public FunctionPass { - - - AliasAnalysis *AA; - TargetData *TD; - ScalarEvolution *SE; - - void advancedDepAnalysis(GetElementPtrInst *gp1, GetElementPtrInst *gp2, - bool valLoad, bool val2Load, - std::vector<Dependence> &deps, bool srcBeforeDest); - - void AnalyzeDeps(Value *val, Value *val2, bool val1Load, bool val2Load, - std::vector<Dependence> &deps, BasicBlock *BB, - bool srcBeforeDest); - - void createDep(std::vector<Dependence> &deps, bool valLoad, bool val2Load, - bool srcBeforeDest, int diff = 0); - - public: - DependenceAnalyzer() { AA = 0; TD = 0; SE = 0; } - virtual bool runOnFunction(Function &F); - virtual const char* getPassName() const { return "DependenceAnalyzer"; } - - // getAnalysisUsage - virtual void getAnalysisUsage(AnalysisUsage &AU) const { - AU.addRequired<AliasAnalysis>(); - AU.addRequired<TargetData>(); - AU.addRequired<ScalarEvolution>(); - AU.setPreservesAll(); - } - - //get dependence info - DependenceResult getDependenceInfo(Instruction *inst1, Instruction *inst2, - bool srcBeforeDest); - - }; - -} - - - -#endif diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/MSSchedule.cpp b/llvm/lib/Target/SparcV9/ModuloScheduling/MSSchedule.cpp deleted file mode 100644 index 52d53243f9e..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/MSSchedule.cpp +++ /dev/null @@ -1,309 +0,0 @@ -//===-- MSSchedule.cpp Schedule ---------------------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// -// -//===----------------------------------------------------------------------===// -#define DEBUG_TYPE "ModuloSched" - -#include "MSSchedule.h" -#include "llvm/Support/Debug.h" -#include "llvm/Target/TargetSchedInfo.h" -#include "../SparcV9Internals.h" -#include "llvm/CodeGen/MachineInstr.h" -#include <iostream> -using namespace llvm; - -//Check if all resources are free -bool resourcesFree(MSchedGraphNode*, int, -std::map<int, std::map<int, int> > &resourceNumPerCycle); - -//Returns a boolean indicating if the start cycle needs to be increased/decreased -bool MSSchedule::insert(MSchedGraphNode *node, int cycle, int II) { - - //First, check if the cycle has a spot free to start - if(schedule.find(cycle) != schedule.end()) { - //Check if we have a free issue slot at this cycle - if (schedule[cycle].size() < numIssue) { - //Now check if all the resources in their respective cycles are available - if(resourcesFree(node, cycle, II)) { - //Insert to preserve dependencies - addToSchedule(cycle,node); - DEBUG(std::cerr << "Found spot in map, and there is an issue slot\n"); - return false; - } - } - } - //Not in the map yet so put it in - else { - if(resourcesFree(node,cycle,II)) { - std::vector<MSchedGraphNode*> nodes; - nodes.push_back(node); - schedule[cycle] = nodes; - DEBUG(std::cerr << "Nothing in map yet so taking an issue slot\n"); - return false; - } - } - - DEBUG(std::cerr << "All issue slots taken\n"); - return true; - -} - -void MSSchedule::addToSchedule(int cycle, MSchedGraphNode *node) { - std::vector<MSchedGraphNode*> nodesAtCycle = schedule[cycle]; - - std::map<unsigned, MSchedGraphNode*> indexMap; - for(unsigned i=0; i < nodesAtCycle.size(); ++i) { - indexMap[nodesAtCycle[i]->getIndex()] = nodesAtCycle[i]; - } - - indexMap[node->getIndex()] = node; - - std::vector<MSchedGraphNode*> nodes; - for(std::map<unsigned, MSchedGraphNode*>::iterator I = indexMap.begin(), E = indexMap.end(); I != E; ++I) - nodes.push_back(I->second); - - schedule[cycle] = nodes; -} - -bool MSSchedule::resourceAvailable(int resourceNum, int cycle) { - bool isFree = true; - - //Get Map for this cycle - if(resourceNumPerCycle.count(cycle)) { - if(resourceNumPerCycle[cycle].count(resourceNum)) { - int maxRes = CPUResource::getCPUResource(resourceNum)->maxNumUsers; - if(resourceNumPerCycle[cycle][resourceNum] >= maxRes) - isFree = false; - } - } - - return isFree; -} - -void MSSchedule::useResource(int resourceNum, int cycle) { - - //Get Map for this cycle - if(resourceNumPerCycle.count(cycle)) { - if(resourceNumPerCycle[cycle].count(resourceNum)) { - resourceNumPerCycle[cycle][resourceNum]++; - } - else { - resourceNumPerCycle[cycle][resourceNum] = 1; - } - } - //If no map, create one! - else { - std::map<int, int> resourceUse; - resourceUse[resourceNum] = 1; - resourceNumPerCycle[cycle] = resourceUse; - } - -} - -bool MSSchedule::resourcesFree(MSchedGraphNode *node, int cycle, int II) { - - //Get Resource usage for this instruction - const TargetSchedInfo *msi = node->getParent()->getTarget()->getSchedInfo(); - int currentCycle = cycle; - bool success = true; - - //Create vector of starting cycles - std::vector<int> cyclesMayConflict; - cyclesMayConflict.push_back(cycle); - - if(resourceNumPerCycle.size() > 0) { - for(int i = cycle-II; i >= (resourceNumPerCycle.begin()->first); i-=II) - cyclesMayConflict.push_back(i); - for(int i = cycle+II; i <= resourceNumPerCycle.end()->first; i+=II) - cyclesMayConflict.push_back(i); - } - - //Now check all cycles for conflicts - for(int index = 0; index < (int) cyclesMayConflict.size(); ++index) { - currentCycle = cyclesMayConflict[index]; - - //Get resource usage for this instruction - InstrRUsage rUsage = msi->getInstrRUsage(node->getInst()->getOpcode()); - std::vector<std::vector<resourceId_t> > resources = rUsage.resourcesByCycle; - - //Loop over resources in each cycle and increments their usage count - for(unsigned i=0; i < resources.size(); ++i) { - for(unsigned j=0; j < resources[i].size(); ++j) { - - //Get Resource to check its availability - int resourceNum = resources[i][j]; - - DEBUG(std::cerr << "Attempting to schedule Resource Num: " << resourceNum << " in cycle: " << currentCycle << "\n"); - - success = resourceAvailable(resourceNum, currentCycle); - - if(!success) - break; - - } - - if(!success) - break; - - //Increase cycle - currentCycle++; - } - - if(!success) - return false; - } - - //Actually put resources into the map - if(success) { - - int currentCycle = cycle; - //Get resource usage for this instruction - InstrRUsage rUsage = msi->getInstrRUsage(node->getInst()->getOpcode()); - std::vector<std::vector<resourceId_t> > resources = rUsage.resourcesByCycle; - - //Loop over resources in each cycle and increments their usage count - for(unsigned i=0; i < resources.size(); ++i) { - for(unsigned j=0; j < resources[i].size(); ++j) { - int resourceNum = resources[i][j]; - useResource(resourceNum, currentCycle); - } - currentCycle++; - } - } - - - return true; - -} - -bool MSSchedule::constructKernel(int II, std::vector<MSchedGraphNode*> &branches, std::map<const MachineInstr*, unsigned> &indVar) { - - //Our schedule is allowed to have negative numbers, so lets calculate this offset - int offset = schedule.begin()->first; - if(offset > 0) - offset = 0; - - DEBUG(std::cerr << "Offset: " << offset << "\n"); - - //Using the schedule, fold up into kernel and check resource conflicts as we go - std::vector<std::pair<MSchedGraphNode*, int> > tempKernel; - - int stageNum = ((schedule.rbegin()->first-offset)+1)/ II; - int maxSN = 0; - - DEBUG(std::cerr << "Number of Stages: " << stageNum << "\n"); - - for(int index = offset; index < (II+offset); ++index) { - int count = 0; - for(int i = index; i <= (schedule.rbegin()->first); i+=II) { - if(schedule.count(i)) { - for(std::vector<MSchedGraphNode*>::iterator I = schedule[i].begin(), - E = schedule[i].end(); I != E; ++I) { - //Check if its a branch - assert(!(*I)->isBranch() && "Branch should not be schedule!"); - - tempKernel.push_back(std::make_pair(*I, count)); - maxSN = std::max(maxSN, count); - - } - } - ++count; - } - } - - - //Add in induction var code - for(std::vector<std::pair<MSchedGraphNode*, int> >::iterator I = tempKernel.begin(), IE = tempKernel.end(); - I != IE; ++I) { - //Add indVar instructions before this one for the current iteration - if(I->second == 0) { - std::map<unsigned, MachineInstr*> tmpMap; - - //Loop over induction variable instructions in the map that come before this instr - for(std::map<const MachineInstr*, unsigned>::iterator N = indVar.begin(), NE = indVar.end(); N != NE; ++N) { - - - if(N->second < I->first->getIndex()) - tmpMap[N->second] = (MachineInstr*) N->first; - } - - //Add to kernel, and delete from indVar - for(std::map<unsigned, MachineInstr*>::iterator N = tmpMap.begin(), NE = tmpMap.end(); N != NE; ++N) { - kernel.push_back(std::make_pair(N->second, 0)); - indVar.erase(N->second); - } - } - - kernel.push_back(std::make_pair((MachineInstr*) I->first->getInst(), I->second)); - - } - - std::map<unsigned, MachineInstr*> tmpMap; - - //Add remaining invar instructions - for(std::map<const MachineInstr*, unsigned>::iterator N = indVar.begin(), NE = indVar.end(); N != NE; ++N) { - tmpMap[N->second] = (MachineInstr*) N->first; - } - - //Add to kernel, and delete from indVar - for(std::map<unsigned, MachineInstr*>::iterator N = tmpMap.begin(), NE = tmpMap.end(); N != NE; ++N) { - kernel.push_back(std::make_pair(N->second, 0)); - indVar.erase(N->second); - } - - - maxStage = maxSN; - - - return true; -} - -bool MSSchedule::defPreviousStage(Value *def, int stage) { - - //Loop over kernel and determine if value is being defined in previous stage - for(std::vector<std::pair<MachineInstr*, int> >::iterator P = kernel.begin(), PE = kernel.end(); P != PE; ++P) { - MachineInstr* inst = P->first; - - //Loop over Machine Operands - for(unsigned i=0; i < inst->getNumOperands(); ++i) { - //get machine operand - const MachineOperand &mOp = inst->getOperand(i); - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { - if(def == mOp.getVRegValue()) { - if(P->second >= stage) - return false; - else - return true; - } - } - } - } - - assert(0 && "We should always have found the def in our kernel\n"); - abort(); -} - - -void MSSchedule::print(std::ostream &os) const { - os << "Schedule:\n"; - - for(schedule_const_iterator I = schedule.begin(), E = schedule.end(); I != E; ++I) { - os << "Cycle: " << I->first << "\n"; - for(std::vector<MSchedGraphNode*>::const_iterator node = I->second.begin(), nodeEnd = I->second.end(); node != nodeEnd; ++node) - os << **node << "\n"; - } - - os << "Kernel:\n"; - for(std::vector<std::pair<MachineInstr*, int> >::const_iterator I = kernel.begin(), - E = kernel.end(); I != E; ++I) - os << "Node: " << *(I->first) << " Stage: " << I->second << "\n"; -} - diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/MSSchedule.h b/llvm/lib/Target/SparcV9/ModuloScheduling/MSSchedule.h deleted file mode 100644 index 34a37db8b65..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/MSSchedule.h +++ /dev/null @@ -1,72 +0,0 @@ -//===-- MSSchedule.h - Schedule ------- -------------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// The schedule generated by a scheduling algorithm -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_MSSCHEDULE_H -#define LLVM_MSSCHEDULE_H - -#include "MSchedGraph.h" -#include <vector> -#include <set> - -namespace llvm { - - class MSSchedule { - std::map<int, std::vector<MSchedGraphNode*> > schedule; - unsigned numIssue; - - //Internal map to keep track of explicit resources - std::map<int, std::map<int, int> > resourceNumPerCycle; - - //Check if all resources are free - bool resourcesFree(MSchedGraphNode*, int, int II); - bool resourceAvailable(int resourceNum, int cycle); - void useResource(int resourceNum, int cycle); - - //Resulting kernel - std::vector<std::pair<MachineInstr*, int> > kernel; - - //Max stage count - int maxStage; - - //add at the right spot in the schedule - void addToSchedule(int, MSchedGraphNode*); - - public: - MSSchedule(int num) : numIssue(num) {} - MSSchedule() : numIssue(4) {} - bool insert(MSchedGraphNode *node, int cycle, int II); - int getStartCycle(MSchedGraphNode *node); - void clear() { schedule.clear(); resourceNumPerCycle.clear(); kernel.clear(); } - std::vector<std::pair<MachineInstr*, int> >* getKernel() { return &kernel; } - bool constructKernel(int II, std::vector<MSchedGraphNode*> &branches, std::map<const MachineInstr*, unsigned> &indVar); - int getMaxStage() { return maxStage; } - bool defPreviousStage(Value *def, int stage); - - //iterators - typedef std::map<int, std::vector<MSchedGraphNode*> >::iterator schedule_iterator; - typedef std::map<int, std::vector<MSchedGraphNode*> >::const_iterator schedule_const_iterator; - schedule_iterator begin() { return schedule.begin(); }; - schedule_iterator end() { return schedule.end(); }; - void print(std::ostream &os) const; - - typedef std::vector<std::pair<MachineInstr*, int> >::iterator kernel_iterator; - typedef std::vector<std::pair<MachineInstr*, int> >::const_iterator kernel_const_iterator; - kernel_iterator kernel_begin() { return kernel.begin(); } - kernel_iterator kernel_end() { return kernel.end(); } - - }; - -} - - -#endif diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/MSScheduleSB.cpp b/llvm/lib/Target/SparcV9/ModuloScheduling/MSScheduleSB.cpp deleted file mode 100644 index 487fb336e06..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/MSScheduleSB.cpp +++ /dev/null @@ -1,325 +0,0 @@ -//===-- MSScheduleSB.cpp Schedule ---------------------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// -// -//===----------------------------------------------------------------------===// -#define DEBUG_TYPE "ModuloSchedSB" - -#include "MSScheduleSB.h" -#include "llvm/Support/Debug.h" -#include "llvm/Target/TargetSchedInfo.h" -#include "../SparcV9Internals.h" -#include "llvm/CodeGen/MachineInstr.h" -#include <iostream> -using namespace llvm; - -//Check if all resources are free -bool resourcesFree(MSchedGraphSBNode*, int, -std::map<int, std::map<int, int> > &resourceNumPerCycle); - -//Returns a boolean indicating if the start cycle needs to be increased/decreased -bool MSScheduleSB::insert(MSchedGraphSBNode *node, int cycle, int II) { - - //First, check if the cycle has a spot free to start - if(schedule.find(cycle) != schedule.end()) { - //Check if we have a free issue slot at this cycle - if (schedule[cycle].size() < numIssue) { - //Now check if all the resources in their respective cycles are available - if(resourcesFree(node, cycle, II)) { - //Insert to preserve dependencies - addToSchedule(cycle,node); - DEBUG(std::cerr << "Found spot in map, and there is an issue slot\n"); - return false; - } - } - } - //Not in the map yet so put it in - else { - if(resourcesFree(node,cycle,II)) { - std::vector<MSchedGraphSBNode*> nodes; - nodes.push_back(node); - schedule[cycle] = nodes; - DEBUG(std::cerr << "Nothing in map yet so taking an issue slot\n"); - return false; - } - } - - DEBUG(std::cerr << "All issue slots taken\n"); - return true; - -} - -void MSScheduleSB::addToSchedule(int cycle, MSchedGraphSBNode *node) { - std::vector<MSchedGraphSBNode*> nodesAtCycle = schedule[cycle]; - - std::map<unsigned, MSchedGraphSBNode*> indexMap; - for(unsigned i=0; i < nodesAtCycle.size(); ++i) { - indexMap[nodesAtCycle[i]->getIndex()] = nodesAtCycle[i]; - } - - indexMap[node->getIndex()] = node; - - std::vector<MSchedGraphSBNode*> nodes; - for(std::map<unsigned, MSchedGraphSBNode*>::iterator I = indexMap.begin(), E = indexMap.end(); I != E; ++I) - nodes.push_back(I->second); - - schedule[cycle] = nodes; -} - -bool MSScheduleSB::resourceAvailable(int resourceNum, int cycle) { - bool isFree = true; - - //Get Map for this cycle - if(resourceNumPerCycle.count(cycle)) { - if(resourceNumPerCycle[cycle].count(resourceNum)) { - int maxRes = CPUResource::getCPUResource(resourceNum)->maxNumUsers; - if(resourceNumPerCycle[cycle][resourceNum] >= maxRes) - isFree = false; - } - } - - return isFree; -} - -void MSScheduleSB::useResource(int resourceNum, int cycle) { - - //Get Map for this cycle - if(resourceNumPerCycle.count(cycle)) { - if(resourceNumPerCycle[cycle].count(resourceNum)) { - resourceNumPerCycle[cycle][resourceNum]++; - } - else { - resourceNumPerCycle[cycle][resourceNum] = 1; - } - } - //If no map, create one! - else { - std::map<int, int> resourceUse; - resourceUse[resourceNum] = 1; - resourceNumPerCycle[cycle] = resourceUse; - } - -} - -bool MSScheduleSB::resourcesFree(MSchedGraphSBNode *node, int cycle, int II) { - - //Get Resource usage for this instruction - const TargetSchedInfo *msi = node->getParent()->getTarget()->getSchedInfo(); - int currentCycle = cycle; - bool success = true; - - //Create vector of starting cycles - std::vector<int> cyclesMayConflict; - cyclesMayConflict.push_back(cycle); - - if(resourceNumPerCycle.size() > 0) { - for(int i = cycle-II; i >= (resourceNumPerCycle.begin()->first); i-=II) - cyclesMayConflict.push_back(i); - for(int i = cycle+II; i <= resourceNumPerCycle.end()->first; i+=II) - cyclesMayConflict.push_back(i); - } - - //Now check all cycles for conflicts - for(int index = 0; index < (int) cyclesMayConflict.size(); ++index) { - currentCycle = cyclesMayConflict[index]; - - //Get resource usage for this instruction - InstrRUsage rUsage = msi->getInstrRUsage(node->getInst()->getOpcode()); - std::vector<std::vector<resourceId_t> > resources = rUsage.resourcesByCycle; - - //Loop over resources in each cycle and increments their usage count - for(unsigned i=0; i < resources.size(); ++i) { - for(unsigned j=0; j < resources[i].size(); ++j) { - - //Get Resource to check its availability - int resourceNum = resources[i][j]; - - DEBUG(std::cerr << "Attempting to schedule Resource Num: " << resourceNum << " in cycle: " << currentCycle << "\n"); - - success = resourceAvailable(resourceNum, currentCycle); - - if(!success) - break; - - } - - if(!success) - break; - - //Increase cycle - currentCycle++; - } - - if(!success) - return false; - } - - //Actually put resources into the map - if(success) { - - int currentCycle = cycle; - //Get resource usage for this instruction - InstrRUsage rUsage = msi->getInstrRUsage(node->getInst()->getOpcode()); - std::vector<std::vector<resourceId_t> > resources = rUsage.resourcesByCycle; - - //Loop over resources in each cycle and increments their usage count - for(unsigned i=0; i < resources.size(); ++i) { - for(unsigned j=0; j < resources[i].size(); ++j) { - int resourceNum = resources[i][j]; - useResource(resourceNum, currentCycle); - } - currentCycle++; - } - } - - - return true; - -} - -bool MSScheduleSB::constructKernel(int II, std::vector<MSchedGraphSBNode*> &branches, std::map<const MachineInstr*, unsigned> &indVar) { - - //Our schedule is allowed to have negative numbers, so lets calculate this offset - int offset = schedule.begin()->first; - if(offset > 0) - offset = 0; - - DEBUG(std::cerr << "Offset: " << offset << "\n"); - - //Using the schedule, fold up into kernel and check resource conflicts as we go - std::vector<std::pair<MSchedGraphSBNode*, int> > tempKernel; - - int stageNum = ((schedule.rbegin()->first-offset)+1)/ II; - int maxSN = 0; - - DEBUG(std::cerr << "Number of Stages: " << stageNum << "\n"); - - for(int index = offset; index < (II+offset); ++index) { - int count = 0; - for(int i = index; i <= (schedule.rbegin()->first); i+=II) { - if(schedule.count(i)) { - for(std::vector<MSchedGraphSBNode*>::iterator I = schedule[i].begin(), - E = schedule[i].end(); I != E; ++I) { - //Check if its a branch - assert(!(*I)->isBranch() && "Branch should not be schedule!"); - - tempKernel.push_back(std::make_pair(*I, count)); - maxSN = std::max(maxSN, count); - - } - } - ++count; - } - } - - - //Add in induction var code - for(std::vector<std::pair<MSchedGraphSBNode*, int> >::iterator I = tempKernel.begin(), IE = tempKernel.end(); - I != IE; ++I) { - //Add indVar instructions before this one for the current iteration - if(I->second == 0) { - std::map<unsigned, MachineInstr*> tmpMap; - - //Loop over induction variable instructions in the map that come before this instr - for(std::map<const MachineInstr*, unsigned>::iterator N = indVar.begin(), NE = indVar.end(); N != NE; ++N) { - - - if(N->second < I->first->getIndex()) - tmpMap[N->second] = (MachineInstr*) N->first; - } - - //Add to kernel, and delete from indVar - for(std::map<unsigned, MachineInstr*>::iterator N = tmpMap.begin(), NE = tmpMap.end(); N != NE; ++N) { - kernel.push_back(std::make_pair(N->second, 0)); - indVar.erase(N->second); - } - } - - kernel.push_back(std::make_pair((MachineInstr*) I->first->getInst(), I->second)); - if(I->first->isPredicate()) { - //assert(I->second == 0 && "Predicate node must be from current iteration\n"); - std::vector<const MachineInstr*> otherInstrs = I->first->getOtherInstrs(); - for(std::vector<const MachineInstr*>::iterator O = otherInstrs.begin(), OE = otherInstrs.end(); O != OE; ++O) { - kernel.push_back(std::make_pair((MachineInstr*) *O, I->second)); - } - } - - } - - std::map<unsigned, MachineInstr*> tmpMap; - - //Add remaining invar instructions - for(std::map<const MachineInstr*, unsigned>::iterator N = indVar.begin(), NE = indVar.end(); N != NE; ++N) { - tmpMap[N->second] = (MachineInstr*) N->first; - } - - //Add to kernel, and delete from indVar - for(std::map<unsigned, MachineInstr*>::iterator N = tmpMap.begin(), NE = tmpMap.end(); N != NE; ++N) { - kernel.push_back(std::make_pair(N->second, 0)); - indVar.erase(N->second); - } - - - maxStage = maxSN; - - - return true; -} - -bool MSScheduleSB::defPreviousStage(Value *def, int stage) { - - //Loop over kernel and determine if value is being defined in previous stage - for(std::vector<std::pair<MachineInstr*, int> >::iterator P = kernel.begin(), PE = kernel.end(); P != PE; ++P) { - MachineInstr* inst = P->first; - - //Loop over Machine Operands - for(unsigned i=0; i < inst->getNumOperands(); ++i) { - //get machine operand - const MachineOperand &mOp = inst->getOperand(i); - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { - if(def == mOp.getVRegValue()) { - if(P->second >= stage) - return false; - else - return true; - } - } - } - } - - assert(0 && "We should always have found the def in our kernel\n"); - abort(); -} - - -void MSScheduleSB::print(std::ostream &os) const { - os << "Schedule:\n"; - - for(schedule_const_iterator I = schedule.begin(), E = schedule.end(); I != E; ++I) { - os << "Cycle: " << I->first << "\n"; - for(std::vector<MSchedGraphSBNode*>::const_iterator node = I->second.begin(), nodeEnd = I->second.end(); node != nodeEnd; ++node) - os << **node << "\n"; - } - - os << "Kernel:\n"; - for(std::vector<std::pair<MachineInstr*, int> >::const_iterator I = kernel.begin(), - E = kernel.end(); I != E; ++I) - os << "Node: " << *(I->first) << " Stage: " << I->second << "\n"; -} - -void MSScheduleSB::printSchedule(std::ostream &os) const { - os << "Schedule:\n"; - - for(schedule_const_iterator I = schedule.begin(), E = schedule.end(); I != E; ++I) { - os << "Cycle: " << I->first << "\n"; - for(std::vector<MSchedGraphSBNode*>::const_iterator node = I->second.begin(), nodeEnd = I->second.end(); node != nodeEnd; ++node) - os << **node << "\n"; - } -} diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/MSScheduleSB.h b/llvm/lib/Target/SparcV9/ModuloScheduling/MSScheduleSB.h deleted file mode 100644 index 40bcb873e22..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/MSScheduleSB.h +++ /dev/null @@ -1,73 +0,0 @@ -//===-- MSScheduleSB.h - Schedule ------- -------------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// The schedule generated by a scheduling algorithm -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_MSSCHEDULESB_H -#define LLVM_MSSCHEDULESB_H - -#include "MSchedGraphSB.h" -#include <vector> -#include <set> - -namespace llvm { - - class MSScheduleSB { - std::map<int, std::vector<MSchedGraphSBNode*> > schedule; - unsigned numIssue; - - //Internal map to keep track of explicit resources - std::map<int, std::map<int, int> > resourceNumPerCycle; - - //Check if all resources are free - bool resourcesFree(MSchedGraphSBNode*, int, int II); - bool resourceAvailable(int resourceNum, int cycle); - void useResource(int resourceNum, int cycle); - - //Resulting kernel - std::vector<std::pair<MachineInstr*, int> > kernel; - - //Max stage count - int maxStage; - - //add at the right spot in the schedule - void addToSchedule(int, MSchedGraphSBNode*); - - public: - MSScheduleSB(int num) : numIssue(num) {} - MSScheduleSB() : numIssue(4) {} - bool insert(MSchedGraphSBNode *node, int cycle, int II); - int getStartCycle(MSchedGraphSBNode *node); - void clear() { schedule.clear(); resourceNumPerCycle.clear(); kernel.clear(); } - std::vector<std::pair<MachineInstr*, int> >* getKernel() { return &kernel; } - bool constructKernel(int II, std::vector<MSchedGraphSBNode*> &branches, std::map<const MachineInstr*, unsigned> &indVar); - int getMaxStage() { return maxStage; } - bool defPreviousStage(Value *def, int stage); - - //iterators - typedef std::map<int, std::vector<MSchedGraphSBNode*> >::iterator schedule_iterator; - typedef std::map<int, std::vector<MSchedGraphSBNode*> >::const_iterator schedule_const_iterator; - schedule_iterator begin() { return schedule.begin(); }; - schedule_iterator end() { return schedule.end(); }; - void print(std::ostream &os) const; - void printSchedule(std::ostream &os) const; - - typedef std::vector<std::pair<MachineInstr*, int> >::iterator kernel_iterator; - typedef std::vector<std::pair<MachineInstr*, int> >::const_iterator kernel_const_iterator; - kernel_iterator kernel_begin() { return kernel.begin(); } - kernel_iterator kernel_end() { return kernel.end(); } - - }; - -} - - -#endif diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.cpp b/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.cpp deleted file mode 100644 index d9b1f9b1202..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.cpp +++ /dev/null @@ -1,804 +0,0 @@ -//===-- MSchedGraph.cpp - Scheduling Graph ----------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// A graph class for dependencies. This graph only contains true, anti, and -// output data dependencies for a given MachineBasicBlock. Dependencies -// across iterations are also computed. Unless data dependence analysis -// is provided, a conservative approach of adding dependencies between all -// loads and stores is taken. -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "ModuloSched" -#include "MSchedGraph.h" -#include "../SparcV9RegisterInfo.h" -#include "../MachineCodeForInstruction.h" -#include "llvm/BasicBlock.h" -#include "llvm/Constants.h" -#include "llvm/Instructions.h" -#include "llvm/Type.h" -#include "llvm/CodeGen/MachineBasicBlock.h" -#include "llvm/Target/TargetInstrInfo.h" -#include "llvm/Support/Debug.h" -#include <cstdlib> -#include <algorithm> -#include <set> -#include <iostream> -using namespace llvm; - -//MSchedGraphNode constructor -MSchedGraphNode::MSchedGraphNode(const MachineInstr* inst, - MSchedGraph *graph, unsigned idx, - unsigned late, bool isBranch) - : Inst(inst), Parent(graph), index(idx), latency(late), - isBranchInstr(isBranch) { - - //Add to the graph - graph->addNode(inst, this); -} - -//MSchedGraphNode copy constructor -MSchedGraphNode::MSchedGraphNode(const MSchedGraphNode &N) - : Predecessors(N.Predecessors), Successors(N.Successors) { - - Inst = N.Inst; - Parent = N.Parent; - index = N.index; - latency = N.latency; - isBranchInstr = N.isBranchInstr; - -} - -//Print the node (instruction and latency) -void MSchedGraphNode::print(std::ostream &os) const { - os << "MSchedGraphNode: Inst=" << *Inst << ", latency= " << latency << "\n"; -} - - -//Get the edge from a predecessor to this node -MSchedGraphEdge MSchedGraphNode::getInEdge(MSchedGraphNode *pred) { - //Loop over all the successors of our predecessor - //return the edge the corresponds to this in edge - for (MSchedGraphNode::succ_iterator I = pred->succ_begin(), - E = pred->succ_end(); I != E; ++I) { - if (*I == this) - return I.getEdge(); - } - assert(0 && "Should have found edge between this node and its predecessor!"); - abort(); -} - -//Get the iteration difference for the edge from this node to its successor -unsigned MSchedGraphNode::getIteDiff(MSchedGraphNode *succ) { - for(std::vector<MSchedGraphEdge>::iterator I = Successors.begin(), - E = Successors.end(); - I != E; ++I) { - if(I->getDest() == succ) - return I->getIteDiff(); - } - return 0; -} - -//Get the index into the vector of edges for the edge from pred to this node -unsigned MSchedGraphNode::getInEdgeNum(MSchedGraphNode *pred) { - //Loop over all the successors of our predecessor - //return the edge the corresponds to this in edge - int count = 0; - for(MSchedGraphNode::succ_iterator I = pred->succ_begin(), - E = pred->succ_end(); - I != E; ++I) { - if(*I == this) - return count; - count++; - } - assert(0 && "Should have found edge between this node and its predecessor!"); - abort(); -} - -//Determine if succ is a successor of this node -bool MSchedGraphNode::isSuccessor(MSchedGraphNode *succ) { - for(succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I) - if(*I == succ) - return true; - return false; -} - -//Dtermine if pred is a predecessor of this node -bool MSchedGraphNode::isPredecessor(MSchedGraphNode *pred) { - if(std::find( Predecessors.begin(), Predecessors.end(), - pred) != Predecessors.end()) - return true; - else - return false; -} - -//Add a node to the graph -void MSchedGraph::addNode(const MachineInstr *MI, - MSchedGraphNode *node) { - - //Make sure node does not already exist - assert(GraphMap.find(MI) == GraphMap.end() - && "New MSchedGraphNode already exists for this instruction"); - - GraphMap[MI] = node; -} - -//Delete a node to the graph -void MSchedGraph::deleteNode(MSchedGraphNode *node) { - - //Delete the edge to this node from all predecessors - while(node->pred_size() > 0) { - //DEBUG(std::cerr << "Delete edge from: " << **P << " to " << *node << "\n"); - MSchedGraphNode *pred = *(node->pred_begin()); - pred->deleteSuccessor(node); - } - - //Remove this node from the graph - GraphMap.erase(node->getInst()); - -} - - -//Create a graph for a machine block. The ignoreInstrs map is so that -//we ignore instructions associated to the index variable since this -//is a special case in Modulo Scheduling. We only want to deal with -//the body of the loop. -MSchedGraph::MSchedGraph(const MachineBasicBlock *bb, - const TargetMachine &targ, - std::map<const MachineInstr*, unsigned> &ignoreInstrs, - DependenceAnalyzer &DA, - std::map<MachineInstr*, Instruction*> &machineTollvm) - : Target(targ) { - - //Make sure BB is not null, - assert(bb != NULL && "Basic Block is null"); - - BBs.push_back(bb); - - //Create nodes and edges for this BB - buildNodesAndEdges(ignoreInstrs, DA, machineTollvm); - - //Experimental! - //addBranchEdges(); -} - -//Create a graph for a machine block. The ignoreInstrs map is so that -//we ignore instructions associated to the index variable since this -//is a special case in Modulo Scheduling. We only want to deal with -//the body of the loop. -MSchedGraph::MSchedGraph(std::vector<const MachineBasicBlock*> &bbs, - const TargetMachine &targ, - std::map<const MachineInstr*, unsigned> &ignoreInstrs, - DependenceAnalyzer &DA, - std::map<MachineInstr*, Instruction*> &machineTollvm) - : BBs(bbs), Target(targ) { - - //Make sure there is at least one BB and it is not null, - assert(((bbs.size() >= 1) && bbs[1] != NULL) && "Basic Block is null"); - - //Create nodes and edges for this BB - buildNodesAndEdges(ignoreInstrs, DA, machineTollvm); - - //Experimental! - //addBranchEdges(); -} - - -//Copies the graph and keeps a map from old to new nodes -MSchedGraph::MSchedGraph(const MSchedGraph &G, - std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes) - : Target(G.Target) { - - BBs = G.BBs; - - std::map<MSchedGraphNode*, MSchedGraphNode*> oldToNew; - //Copy all nodes - for(MSchedGraph::const_iterator N = G.GraphMap.begin(), - NE = G.GraphMap.end(); N != NE; ++N) { - - MSchedGraphNode *newNode = new MSchedGraphNode(*(N->second)); - oldToNew[&*(N->second)] = newNode; - newNodes[newNode] = &*(N->second); - GraphMap[&*(N->first)] = newNode; - } - - //Loop over nodes and update edges to point to new nodes - for(MSchedGraph::iterator N = GraphMap.begin(), NE = GraphMap.end(); - N != NE; ++N) { - - //Get the node we are dealing with - MSchedGraphNode *node = &*(N->second); - - node->setParent(this); - - //Loop over nodes successors and predecessors and update to the new nodes - for(unsigned i = 0; i < node->pred_size(); ++i) { - node->setPredecessor(i, oldToNew[node->getPredecessor(i)]); - } - - for(unsigned i = 0; i < node->succ_size(); ++i) { - MSchedGraphEdge *edge = node->getSuccessor(i); - MSchedGraphNode *oldDest = edge->getDest(); - edge->setDest(oldToNew[oldDest]); - } - } -} - -//Deconstructor, deletes all nodes in the graph -MSchedGraph::~MSchedGraph () { - for(MSchedGraph::iterator I = GraphMap.begin(), E = GraphMap.end(); - I != E; ++I) - delete I->second; -} - -//Print out graph -void MSchedGraph::print(std::ostream &os) const { - for(MSchedGraph::const_iterator N = GraphMap.begin(), NE = GraphMap.end(); - N != NE; ++N) { - - //Get the node we are dealing with - MSchedGraphNode *node = &*(N->second); - - os << "Node Start\n"; - node->print(os); - os << "Successors:\n"; - //print successors - for(unsigned i = 0; i < node->succ_size(); ++i) { - MSchedGraphEdge *edge = node->getSuccessor(i); - MSchedGraphNode *oldDest = edge->getDest(); - oldDest->print(os); - } - os << "Node End\n"; - } -} - -//Calculate total delay -int MSchedGraph::totalDelay() { - int sum = 0; - - for(MSchedGraph::const_iterator N = GraphMap.begin(), NE = GraphMap.end(); - N != NE; ++N) { - - //Get the node we are dealing with - MSchedGraphNode *node = &*(N->second); - sum += node->getLatency(); - } - return sum; -} -//Experimental code to add edges from the branch to all nodes dependent upon it. -void hasPath(MSchedGraphNode *node, std::set<MSchedGraphNode*> &visited, - std::set<MSchedGraphNode*> &branches, MSchedGraphNode *startNode, - std::set<std::pair<MSchedGraphNode*,MSchedGraphNode*> > &newEdges ) { - - visited.insert(node); - DEBUG(std::cerr << "Visiting: " << *node << "\n"); - //Loop over successors - for(unsigned i = 0; i < node->succ_size(); ++i) { - MSchedGraphEdge *edge = node->getSuccessor(i); - MSchedGraphNode *dest = edge->getDest(); - if(branches.count(dest)) - newEdges.insert(std::make_pair(dest, startNode)); - - //only visit if we have not already - else if(!visited.count(dest)) { - if(edge->getIteDiff() == 0) - hasPath(dest, visited, branches, startNode, newEdges);} - - } - -} - -//Experimental code to add edges from the branch to all nodes dependent upon it. -void MSchedGraph::addBranchEdges() { - std::set<MSchedGraphNode*> branches; - std::set<MSchedGraphNode*> nodes; - - for(MSchedGraph::iterator I = GraphMap.begin(), E = GraphMap.end(); - I != E; ++I) { - if(I->second->isBranch()) - if(I->second->hasPredecessors()) - branches.insert(I->second); - } - - //See if there is a path first instruction to the branches, if so, add an - //iteration dependence between that node and the branch - std::set<std::pair<MSchedGraphNode*, MSchedGraphNode*> > newEdges; - for(MSchedGraph::iterator I = GraphMap.begin(), E = GraphMap.end(); - I != E; ++I) { - std::set<MSchedGraphNode*> visited; - hasPath((I->second), visited, branches, (I->second), newEdges); - } - - //Spit out all edges we are going to add - unsigned min = GraphMap.size(); - if(newEdges.size() == 1) { - ((newEdges.begin())->first)->addOutEdge(((newEdges.begin())->second), - MSchedGraphEdge::BranchDep, - MSchedGraphEdge::NonDataDep, 1); - } - else { - - unsigned count = 0; - MSchedGraphNode *start; - MSchedGraphNode *end; - for(std::set<std::pair<MSchedGraphNode*, MSchedGraphNode*> >::iterator I = newEdges.begin(), E = newEdges.end(); I != E; ++I) { - - DEBUG(std::cerr << "Branch Edge from: " << *(I->first) << " to " << *(I->second) << "\n"); - - // if(I->second->getIndex() <= min) { - start = I->first; - end = I->second; - //min = I->second->getIndex(); - //} - start->addOutEdge(end, - MSchedGraphEdge::BranchDep, - MSchedGraphEdge::NonDataDep, 1); - } - } -} - - -//Add edges between the nodes -void MSchedGraph::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ignoreInstrs, - DependenceAnalyzer &DA, - std::map<MachineInstr*, Instruction*> &machineTollvm) { - - - //Get Machine target information for calculating latency - const TargetInstrInfo *MTI = Target.getInstrInfo(); - - std::vector<MSchedGraphNode*> memInstructions; - std::map<int, std::vector<OpIndexNodePair> > regNumtoNodeMap; - std::map<const Value*, std::vector<OpIndexNodePair> > valuetoNodeMap; - - //Save PHI instructions to deal with later - std::vector<const MachineInstr*> phiInstrs; - unsigned index = 0; - - for(std::vector<const MachineBasicBlock*>::iterator B = BBs.begin(), - BE = BBs.end(); B != BE; ++B) { - - const MachineBasicBlock *BB = *B; - - //Loop over instructions in MBB and add nodes and edges - for (MachineBasicBlock::const_iterator MI = BB->begin(), e = BB->end(); - MI != e; ++MI) { - - //Ignore indvar instructions - if(ignoreInstrs.count(MI)) { - ++index; - continue; - } - - //Get each instruction of machine basic block, get the delay - //using the op code, create a new node for it, and add to the - //graph. - - MachineOpCode opCode = MI->getOpcode(); - int delay; - -#if 0 // FIXME: LOOK INTO THIS - //Check if subsequent instructions can be issued before - //the result is ready, if so use min delay. - if(MTI->hasResultInterlock(MIopCode)) - delay = MTI->minLatency(MIopCode); - else -#endif - //Get delay - delay = MTI->maxLatency(opCode); - - //Create new node for this machine instruction and add to the graph. - //Create only if not a nop - if(MTI->isNop(opCode)) - continue; - - //Sparc BE does not use PHI opcode, so assert on this case - assert(opCode != TargetInstrInfo::PHI && "Did not expect PHI opcode"); - - bool isBranch = false; - - //We want to flag the branch node to treat it special - if(MTI->isBranch(opCode)) - isBranch = true; - - //Node is created and added to the graph automatically - MSchedGraphNode *node = new MSchedGraphNode(MI, this, index, delay, - isBranch); - - DEBUG(std::cerr << "Created Node: " << *node << "\n"); - - //Check OpCode to keep track of memory operations to add memory - //dependencies later. - if(MTI->isLoad(opCode) || MTI->isStore(opCode)) - memInstructions.push_back(node); - - //Loop over all operands, and put them into the register number to - //graph node map for determining dependencies - //If an operands is a use/def, we have an anti dependence to itself - for(unsigned i=0; i < MI->getNumOperands(); ++i) { - //Get Operand - const MachineOperand &mOp = MI->getOperand(i); - - //Check if it has an allocated register - if(mOp.hasAllocatedReg()) { - int regNum = mOp.getReg(); - - if(regNum != SparcV9::g0) { - //Put into our map - regNumtoNodeMap[regNum].push_back(std::make_pair(i, node)); - } - continue; - } - - - //Add virtual registers dependencies - //Check if any exist in the value map already and create dependencies - //between them. - if(mOp.getType() == MachineOperand::MO_VirtualRegister - || mOp.getType() == MachineOperand::MO_CCRegister) { - - //Make sure virtual register value is not null - assert((mOp.getVRegValue() != NULL) && "Null value is defined"); - - //Check if this is a read operation in a phi node, if so DO NOT PROCESS - if(mOp.isUse() && (opCode == TargetInstrInfo::PHI)) { - DEBUG(std::cerr << "Read Operation in a PHI node\n"); - continue; - } - - if (const Value* srcI = mOp.getVRegValue()) { - - //Find value in the map - std::map<const Value*, std::vector<OpIndexNodePair> >::iterator V - = valuetoNodeMap.find(srcI); - - //If there is something in the map already, add edges from - //those instructions - //to this one we are processing - if(V != valuetoNodeMap.end()) { - addValueEdges(V->second, node, mOp.isUse(), mOp.isDef(), phiInstrs); - - //Add to value map - V->second.push_back(std::make_pair(i,node)); - } - //Otherwise put it in the map - else - //Put into value map - valuetoNodeMap[mOp.getVRegValue()].push_back(std::make_pair(i, node)); - } - } - } - ++index; - } - - //Loop over LLVM BB, examine phi instructions, and add them to our - //phiInstr list to process - const BasicBlock *llvm_bb = BB->getBasicBlock(); - for(BasicBlock::const_iterator I = llvm_bb->begin(), E = llvm_bb->end(); - I != E; ++I) { - if(const PHINode *PN = dyn_cast<PHINode>(I)) { - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(PN); - for (unsigned j = 0; j < tempMvec.size(); j++) { - if(!ignoreInstrs.count(tempMvec[j])) { - DEBUG(std::cerr << "Inserting phi instr into map: " << *tempMvec[j] << "\n"); - phiInstrs.push_back((MachineInstr*) tempMvec[j]); - } - } - } - - } - - addMemEdges(memInstructions, DA, machineTollvm); - addMachRegEdges(regNumtoNodeMap); - - //Finally deal with PHI Nodes and Value* - for(std::vector<const MachineInstr*>::iterator I = phiInstrs.begin(), - E = phiInstrs.end(); I != E; ++I) { - - //Get Node for this instruction - std::map<const MachineInstr*, MSchedGraphNode*>::iterator X; - X = find(*I); - - if(X == GraphMap.end()) - continue; - - MSchedGraphNode *node = X->second; - - DEBUG(std::cerr << "Adding ite diff edges for node: " << *node << "\n"); - - //Loop over operands for this instruction and add value edges - for(unsigned i=0; i < (*I)->getNumOperands(); ++i) { - //Get Operand - const MachineOperand &mOp = (*I)->getOperand(i); - if((mOp.getType() == MachineOperand::MO_VirtualRegister - || mOp.getType() == MachineOperand::MO_CCRegister) && mOp.isUse()) { - - //find the value in the map - if (const Value* srcI = mOp.getVRegValue()) { - - //Find value in the map - std::map<const Value*, std::vector<OpIndexNodePair> >::iterator V - = valuetoNodeMap.find(srcI); - - //If there is something in the map already, add edges from - //those instructions - //to this one we are processing - if(V != valuetoNodeMap.end()) { - addValueEdges(V->second, node, mOp.isUse(), mOp.isDef(), - phiInstrs, 1); - } - } - } - } - } - } -} -//Add dependencies for Value*s -void MSchedGraph::addValueEdges(std::vector<OpIndexNodePair> &NodesInMap, - MSchedGraphNode *destNode, bool nodeIsUse, - bool nodeIsDef, std::vector<const MachineInstr*> &phiInstrs, int diff) { - - for(std::vector<OpIndexNodePair>::iterator I = NodesInMap.begin(), - E = NodesInMap.end(); I != E; ++I) { - - //Get node in vectors machine operand that is the same value as node - MSchedGraphNode *srcNode = I->second; - MachineOperand mOp = srcNode->getInst()->getOperand(I->first); - - if(diff > 0) - if(std::find(phiInstrs.begin(), phiInstrs.end(), srcNode->getInst()) == phiInstrs.end()) - continue; - - //Node is a Def, so add output dep. - if(nodeIsDef) { - if(mOp.isUse()) { - DEBUG(std::cerr << "Edge from " << *srcNode << " to " << *destNode << " (itediff=" << diff << ", type=anti)\n"); - srcNode->addOutEdge(destNode, MSchedGraphEdge::ValueDep, - MSchedGraphEdge::AntiDep, diff); - } - if(mOp.isDef()) { - DEBUG(std::cerr << "Edge from " << *srcNode << " to " << *destNode << " (itediff=" << diff << ", type=output)\n"); - srcNode->addOutEdge(destNode, MSchedGraphEdge::ValueDep, - MSchedGraphEdge::OutputDep, diff); - } - } - if(nodeIsUse) { - if(mOp.isDef()) { - DEBUG(std::cerr << "Edge from " << *srcNode << " to " << *destNode << " (itediff=" << diff << ", type=true)\n"); - srcNode->addOutEdge(destNode, MSchedGraphEdge::ValueDep, - MSchedGraphEdge::TrueDep, diff); - } - } - } -} - -//Add dependencies for machine registers across iterations -void MSchedGraph::addMachRegEdges(std::map<int, std::vector<OpIndexNodePair> >& regNumtoNodeMap) { - //Loop over all machine registers in the map, and add dependencies - //between the instructions that use it - typedef std::map<int, std::vector<OpIndexNodePair> > regNodeMap; - for(regNodeMap::iterator I = regNumtoNodeMap.begin(); - I != regNumtoNodeMap.end(); ++I) { - //Get the register number - int regNum = (*I).first; - - //Get Vector of nodes that use this register - std::vector<OpIndexNodePair> Nodes = (*I).second; - - //Loop over nodes and determine the dependence between the other - //nodes in the vector - for(unsigned i =0; i < Nodes.size(); ++i) { - - //Get src node operator index that uses this machine register - int srcOpIndex = Nodes[i].first; - - //Get the actual src Node - MSchedGraphNode *srcNode = Nodes[i].second; - - //Get Operand - const MachineOperand &srcMOp = srcNode->getInst()->getOperand(srcOpIndex); - - bool srcIsUseandDef = srcMOp.isDef() && srcMOp.isUse(); - bool srcIsUse = srcMOp.isUse() && !srcMOp.isDef(); - - - //Look at all instructions after this in execution order - for(unsigned j=i+1; j < Nodes.size(); ++j) { - - //Sink node is a write - if(Nodes[j].second->getInst()->getOperand(Nodes[j].first).isDef()) { - //Src only uses the register (read) - if(srcIsUse) - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::AntiDep); - - else if(srcIsUseandDef) { - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::AntiDep); - - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::OutputDep); - } - else - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::OutputDep); - } - //Dest node is a read - else { - if(!srcIsUse || srcIsUseandDef) - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::TrueDep); - } - - } - - //Look at all the instructions before this one since machine registers - //could live across iterations. - for(unsigned j = 0; j < i; ++j) { - //Sink node is a write - if(Nodes[j].second->getInst()->getOperand(Nodes[j].first).isDef()) { - //Src only uses the register (read) - if(srcIsUse) - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::AntiDep, 1); - else if(srcIsUseandDef) { - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::AntiDep, 1); - - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::OutputDep, 1); - } - else - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::OutputDep, 1); - } - //Dest node is a read - else { - if(!srcIsUse || srcIsUseandDef) - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphEdge::MachineRegister, - MSchedGraphEdge::TrueDep,1 ); - } - - - } - - } - - } - -} - -//Add edges between all loads and stores -//Can be less strict with alias analysis and data dependence analysis. -void MSchedGraph::addMemEdges(const std::vector<MSchedGraphNode*>& memInst, - DependenceAnalyzer &DA, - std::map<MachineInstr*, Instruction*> &machineTollvm) { - - //Get Target machine instruction info - const TargetInstrInfo *TMI = Target.getInstrInfo(); - - //Loop over all memory instructions in the vector - //Knowing that they are in execution, add true, anti, and output dependencies - for (unsigned srcIndex = 0; srcIndex < memInst.size(); ++srcIndex) { - - MachineInstr *srcInst = (MachineInstr*) memInst[srcIndex]->getInst(); - - //Get the machine opCode to determine type of memory instruction - MachineOpCode srcNodeOpCode = srcInst->getOpcode(); - - //All instructions after this one in execution order have an - //iteration delay of 0 - for(unsigned destIndex = 0; destIndex < memInst.size(); ++destIndex) { - - //No self loops - if(destIndex == srcIndex) - continue; - - MachineInstr *destInst = (MachineInstr*) memInst[destIndex]->getInst(); - - DEBUG(std::cerr << "MInst1: " << *srcInst << "\n"); - DEBUG(std::cerr << "MInst2: " << *destInst << "\n"); - - //Assuming instructions without corresponding llvm instructions - //are from constant pools. - if (!machineTollvm.count(srcInst) || !machineTollvm.count(destInst)) - continue; - - bool useDepAnalyzer = true; - - //Some machine loads and stores are generated by casts, so be - //conservative and always add deps - Instruction *srcLLVM = machineTollvm[srcInst]; - Instruction *destLLVM = machineTollvm[destInst]; - if(!isa<LoadInst>(srcLLVM) - && !isa<StoreInst>(srcLLVM)) { - if(isa<BinaryOperator>(srcLLVM)) { - if(isa<ConstantFP>(srcLLVM->getOperand(0)) || isa<ConstantFP>(srcLLVM->getOperand(1))) - continue; - } - useDepAnalyzer = false; - } - if(!isa<LoadInst>(destLLVM) - && !isa<StoreInst>(destLLVM)) { - if(isa<BinaryOperator>(destLLVM)) { - if(isa<ConstantFP>(destLLVM->getOperand(0)) || isa<ConstantFP>(destLLVM->getOperand(1))) - continue; - } - useDepAnalyzer = false; - } - - //Use dep analysis when we have corresponding llvm loads/stores - if(useDepAnalyzer) { - bool srcBeforeDest = true; - if(destIndex < srcIndex) - srcBeforeDest = false; - - DependenceResult dr = DA.getDependenceInfo(machineTollvm[srcInst], - machineTollvm[destInst], - srcBeforeDest); - - for(std::vector<Dependence>::iterator d = dr.dependences.begin(), - de = dr.dependences.end(); d != de; ++d) { - //Add edge from load to store - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphEdge::MemoryDep, - d->getDepType(), d->getIteDiff()); - - } - } - //Otherwise, we can not do any further analysis and must make a dependence - else { - - //Get the machine opCode to determine type of memory instruction - MachineOpCode destNodeOpCode = destInst->getOpcode(); - - //Get the Value* that we are reading from the load, always the first op - const MachineOperand &mOp = srcInst->getOperand(0); - const MachineOperand &mOp2 = destInst->getOperand(0); - - if(mOp.hasAllocatedReg()) - if(mOp.getReg() == SparcV9::g0) - continue; - if(mOp2.hasAllocatedReg()) - if(mOp2.getReg() == SparcV9::g0) - continue; - - DEBUG(std::cerr << "Adding dependence for machine instructions\n"); - //Load-Store deps - if(TMI->isLoad(srcNodeOpCode)) { - - if(TMI->isStore(destNodeOpCode)) - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphEdge::MemoryDep, - MSchedGraphEdge::AntiDep, 0); - } - else if(TMI->isStore(srcNodeOpCode)) { - if(TMI->isStore(destNodeOpCode)) - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphEdge::MemoryDep, - MSchedGraphEdge::OutputDep, 0); - - else - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphEdge::MemoryDep, - MSchedGraphEdge::TrueDep, 0); - } - } - } - } -} diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.h b/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.h deleted file mode 100644 index 201b3083a19..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.h +++ /dev/null @@ -1,398 +0,0 @@ -//===-- MSchedGraph.h - Scheduling Graph ------------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// A graph class for dependencies. This graph only contains true, anti, and -// output data dependencies for a given MachineBasicBlock. Dependencies -// across iterations are also computed. Unless data dependence analysis -// is provided, a conservative approach of adding dependencies between all -// loads and stores is taken. -//===----------------------------------------------------------------------===// - -#ifndef LLVM_MSCHEDGRAPH_H -#define LLVM_MSCHEDGRAPH_H -#include "DependenceAnalyzer.h" -#include "llvm/Analysis/AliasAnalysis.h" -#include "llvm/CodeGen/MachineInstr.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetData.h" -#include "llvm/ADT/GraphTraits.h" -#include "llvm/ADT/STLExtras.h" -#include "llvm/ADT/iterator" -#include <vector> - -namespace llvm { - - class MSchedGraph; - class MSchedGraphNode; - template<class IteratorType, class NodeType> - class MSchedGraphNodeIterator; - - //MSchedGraphEdge encapsulates the data dependence between nodes. It - //identifies the dependence type, on what, and the iteration - //difference - struct MSchedGraphEdge { - enum DataDepOrderType { - TrueDep, AntiDep, OutputDep, NonDataDep - }; - - enum MSchedGraphEdgeType { - MemoryDep, ValueDep, MachineRegister, BranchDep - }; - - //Get or set edge data - MSchedGraphNode *getDest() const { return dest; } - unsigned getIteDiff() { return iteDiff; } - unsigned getDepOrderType() { return depOrderType; } - void setDest(MSchedGraphNode *newDest) { dest = newDest; } - - private: - friend class MSchedGraphNode; - MSchedGraphEdge(MSchedGraphNode *destination, MSchedGraphEdgeType type, - unsigned deptype, unsigned diff) - : dest(destination), depType(type), depOrderType(deptype), iteDiff(diff) {} - - MSchedGraphNode *dest; - MSchedGraphEdgeType depType; - unsigned depOrderType; - unsigned iteDiff; - }; - - //MSchedGraphNode represents a machine instruction and its - //corresponding latency. Each node also contains a list of its - //predecessors and sucessors. - class MSchedGraphNode { - - const MachineInstr* Inst; //Machine Instruction - MSchedGraph* Parent; //Graph this node belongs to - unsigned index; //Index in BB - unsigned latency; //Latency of Instruction - bool isBranchInstr; //Is this node the branch instr or not - - std::vector<MSchedGraphNode*> Predecessors; //Predecessor Nodes - std::vector<MSchedGraphEdge> Successors; //Successor edges - - public: - MSchedGraphNode(const MachineInstr *inst, MSchedGraph *graph, - unsigned index, unsigned late=0, bool isBranch=false); - - MSchedGraphNode(const MSchedGraphNode &N); - - //Iterators - Predecessor and Succussor - typedef std::vector<MSchedGraphNode*>::iterator pred_iterator; - pred_iterator pred_begin() { return Predecessors.begin(); } - pred_iterator pred_end() { return Predecessors.end(); } - unsigned pred_size() { return Predecessors.size(); } - - typedef std::vector<MSchedGraphNode*>::const_iterator pred_const_iterator; - pred_const_iterator pred_begin() const { return Predecessors.begin(); } - pred_const_iterator pred_end() const { return Predecessors.end(); } - - typedef MSchedGraphNodeIterator<std::vector<MSchedGraphEdge>::const_iterator, - const MSchedGraphNode> succ_const_iterator; - succ_const_iterator succ_begin() const; - succ_const_iterator succ_end() const; - - typedef MSchedGraphNodeIterator<std::vector<MSchedGraphEdge>::iterator, - MSchedGraphNode> succ_iterator; - succ_iterator succ_begin(); - succ_iterator succ_end(); - unsigned succ_size() { return Successors.size(); } - - //Get or set predecessor nodes, or successor edges - void setPredecessor(unsigned index, MSchedGraphNode *dest) { - Predecessors[index] = dest; - } - - MSchedGraphNode* getPredecessor(unsigned index) { - return Predecessors[index]; - } - - MSchedGraphEdge* getSuccessor(unsigned index) { - return &Successors[index]; - } - - void deleteSuccessor(MSchedGraphNode *node) { - for (unsigned i = 0; i != Successors.size(); ++i) - if (Successors[i].getDest() == node) { - Successors.erase(Successors.begin()+i); - node->Predecessors.erase(std::find(node->Predecessors.begin(), - node->Predecessors.end(), this)); - --i; //Decrease index var since we deleted a node - } - } - - void addOutEdge(MSchedGraphNode *destination, - MSchedGraphEdge::MSchedGraphEdgeType type, - unsigned deptype, unsigned diff=0) { - Successors.push_back(MSchedGraphEdge(destination, type, deptype,diff)); - destination->Predecessors.push_back(this); - } - - //General methods to get and set data for the node - const MachineInstr* getInst() { return Inst; } - MSchedGraph* getParent() { return Parent; } - bool hasPredecessors() { return (Predecessors.size() > 0); } - bool hasSuccessors() { return (Successors.size() > 0); } - unsigned getLatency() { return latency; } - unsigned getLatency() const { return latency; } - unsigned getIndex() { return index; } - unsigned getIteDiff(MSchedGraphNode *succ); - MSchedGraphEdge getInEdge(MSchedGraphNode *pred); - unsigned getInEdgeNum(MSchedGraphNode *pred); - bool isSuccessor(MSchedGraphNode *); - bool isPredecessor(MSchedGraphNode *); - bool isBranch() { return isBranchInstr; } - - //Debug support - void print(std::ostream &os) const; - void setParent(MSchedGraph *p) { Parent = p; } - }; - - //Node iterator for graph generation - template<class IteratorType, class NodeType> - class MSchedGraphNodeIterator : public forward_iterator<NodeType*, ptrdiff_t> { - IteratorType I; // std::vector<MSchedGraphEdge>::iterator or const_iterator - public: - MSchedGraphNodeIterator(IteratorType i) : I(i) {} - - bool operator==(const MSchedGraphNodeIterator RHS) const { return I == RHS.I; } - bool operator!=(const MSchedGraphNodeIterator RHS) const { return I != RHS.I; } - - const MSchedGraphNodeIterator &operator=(const MSchedGraphNodeIterator &RHS) { - I = RHS.I; - return *this; - } - - NodeType* operator*() const { - return I->getDest(); - } - NodeType* operator->() const { return operator*(); } - - MSchedGraphNodeIterator& operator++() { // Preincrement - ++I; - return *this; - } - MSchedGraphNodeIterator operator++(int) { // Postincrement - MSchedGraphNodeIterator tmp = *this; ++*this; return tmp; - } - - MSchedGraphEdge &getEdge() { - return *I; - } - const MSchedGraphEdge &getEdge() const { - return *I; - } - }; - - inline MSchedGraphNode::succ_const_iterator MSchedGraphNode::succ_begin() const { - return succ_const_iterator(Successors.begin()); - } - inline MSchedGraphNode::succ_const_iterator MSchedGraphNode::succ_end() const { - return succ_const_iterator(Successors.end()); - } - inline MSchedGraphNode::succ_iterator MSchedGraphNode::succ_begin() { - return succ_iterator(Successors.begin()); - } - inline MSchedGraphNode::succ_iterator MSchedGraphNode::succ_end() { - return succ_iterator(Successors.end()); - } - - // ostream << operator for MSGraphNode class - inline std::ostream &operator<<(std::ostream &os, - const MSchedGraphNode &node) { - node.print(os); - return os; - } - - - // Provide specializations of GraphTraits to be able to use graph - // iterators on the scheduling graph! - // - template <> struct GraphTraits<MSchedGraphNode*> { - typedef MSchedGraphNode NodeType; - typedef MSchedGraphNode::succ_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->succ_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->succ_end(); - } - - static NodeType *getEntryNode(NodeType* N) { return N; } - }; - - - - //Graph class to represent dependence graph - class MSchedGraph { - - std::vector<const MachineBasicBlock *> BBs; //Machine basic block - const TargetMachine &Target; //Target Machine - - //Nodes - std::map<const MachineInstr*, MSchedGraphNode*> GraphMap; - - //Add Nodes and Edges to this graph for our BB - typedef std::pair<int, MSchedGraphNode*> OpIndexNodePair; - void buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ignoreInstrs, DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm); - void addValueEdges(std::vector<OpIndexNodePair> &NodesInMap, - MSchedGraphNode *node, - bool nodeIsUse, bool nodeIsDef, std::vector<const MachineInstr*> &phiInstrs, int diff=0); - void addMachRegEdges(std::map<int, - std::vector<OpIndexNodePair> >& regNumtoNodeMap); - void addMemEdges(const std::vector<MSchedGraphNode*>& memInst, - DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm); - void addBranchEdges(); - - public: - MSchedGraph(const MachineBasicBlock *bb, const TargetMachine &targ, - std::map<const MachineInstr*, unsigned> &ignoreInstrs, - DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm); - - //Copy constructor with maps to link old nodes to new nodes - MSchedGraph(const MSchedGraph &G, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes); - - MSchedGraph(std::vector<const MachineBasicBlock*> &bbs, - const TargetMachine &targ, - std::map<const MachineInstr*, unsigned> &ignoreInstrs, - DependenceAnalyzer &DA, - std::map<MachineInstr*, Instruction*> &machineTollvm); - - //Print graph - void print(std::ostream &os) const; - - //Deconstructor! - ~MSchedGraph(); - - //Add or delete nodes from the Graph - void addNode(const MachineInstr* MI, MSchedGraphNode *node); - void deleteNode(MSchedGraphNode *node); - int totalDelay(); - - //iterators - typedef std::map<const MachineInstr*, MSchedGraphNode*>::iterator iterator; - typedef std::map<const MachineInstr*, MSchedGraphNode*>::const_iterator const_iterator; - typedef std::map<const MachineInstr*, MSchedGraphNode*>::reverse_iterator reverse_iterator; - iterator find(const MachineInstr* I) { return GraphMap.find(I); } - iterator end() { return GraphMap.end(); } - iterator begin() { return GraphMap.begin(); } - unsigned size() { return GraphMap.size(); } - reverse_iterator rbegin() { return GraphMap.rbegin(); } - reverse_iterator rend() { return GraphMap.rend(); } - - //Get Target or original machine basic block - const TargetMachine* getTarget() { return &Target; } - std::vector<const MachineBasicBlock*> getBBs() { return BBs; } - }; - - - - - - // Provide specializations of GraphTraits to be able to use graph - // iterators on the scheduling graph - static MSchedGraphNode& getSecond(std::pair<const MachineInstr* const, - MSchedGraphNode*> &Pair) { - return *Pair.second; - } - - template <> struct GraphTraits<MSchedGraph*> { - typedef MSchedGraphNode NodeType; - typedef MSchedGraphNode::succ_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->succ_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->succ_end(); - } - - typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, - MSchedGraphNode*>&, MSchedGraphNode&> DerefFun; - - typedef mapped_iterator<MSchedGraph::iterator, DerefFun> nodes_iterator; - static nodes_iterator nodes_begin(MSchedGraph *G) { - return map_iterator(((MSchedGraph*)G)->begin(), DerefFun(getSecond)); - } - static nodes_iterator nodes_end(MSchedGraph *G) { - return map_iterator(((MSchedGraph*)G)->end(), DerefFun(getSecond)); - } - - }; - - template <> struct GraphTraits<const MSchedGraph*> { - typedef const MSchedGraphNode NodeType; - typedef MSchedGraphNode::succ_const_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->succ_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->succ_end(); - } - typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, - MSchedGraphNode*>&, MSchedGraphNode&> DerefFun; - - typedef mapped_iterator<MSchedGraph::iterator, DerefFun> nodes_iterator; - static nodes_iterator nodes_begin(MSchedGraph *G) { - return map_iterator(((MSchedGraph*)G)->begin(), DerefFun(getSecond)); - } - static nodes_iterator nodes_end(MSchedGraph *G) { - return map_iterator(((MSchedGraph*)G)->end(), DerefFun(getSecond)); - } - }; - - template <> struct GraphTraits<Inverse<MSchedGraph*> > { - typedef MSchedGraphNode NodeType; - typedef MSchedGraphNode::pred_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->pred_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->pred_end(); - } - typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, - MSchedGraphNode*>&, MSchedGraphNode&> DerefFun; - - typedef mapped_iterator<MSchedGraph::iterator, DerefFun> nodes_iterator; - static nodes_iterator nodes_begin(MSchedGraph *G) { - return map_iterator(((MSchedGraph*)G)->begin(), DerefFun(getSecond)); - } - static nodes_iterator nodes_end(MSchedGraph *G) { - return map_iterator(((MSchedGraph*)G)->end(), DerefFun(getSecond)); - } - }; - - template <> struct GraphTraits<Inverse<const MSchedGraph*> > { - typedef const MSchedGraphNode NodeType; - typedef MSchedGraphNode::pred_const_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->pred_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->pred_end(); - } - - typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, - MSchedGraphNode*>&, MSchedGraphNode&> DerefFun; - - typedef mapped_iterator<MSchedGraph::iterator, DerefFun> nodes_iterator; - static nodes_iterator nodes_begin(MSchedGraph *G) { - return map_iterator(((MSchedGraph*)G)->begin(), DerefFun(getSecond)); - } - static nodes_iterator nodes_end(MSchedGraph *G) { - return map_iterator(((MSchedGraph*)G)->end(), DerefFun(getSecond)); - } - }; -} - -#endif diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraphSB.cpp b/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraphSB.cpp deleted file mode 100644 index bd879f87786..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraphSB.cpp +++ /dev/null @@ -1,870 +0,0 @@ -//===-- MSchedGraphSB.cpp - Scheduling Graph ----------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// A graph class for dependencies. This graph only contains true, anti, and -// output data dependencies for a given MachineBasicBlock. Dependencies -// across iterations are also computed. Unless data dependence analysis -// is provided, a conservative approach of adding dependencies between all -// loads and stores is taken. -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "ModuloSchedSB" -#include "MSchedGraphSB.h" -#include "../SparcV9RegisterInfo.h" -#include "../MachineCodeForInstruction.h" -#include "llvm/BasicBlock.h" -#include "llvm/Constants.h" -#include "llvm/Instructions.h" -#include "llvm/Type.h" -#include "llvm/CodeGen/MachineBasicBlock.h" -#include "llvm/Target/TargetInstrInfo.h" -#include "llvm/Support/Debug.h" -#include <cstdlib> -#include <algorithm> -#include <set> -#include "llvm/Target/TargetSchedInfo.h" -#include "../SparcV9Internals.h" -#include <iostream> -using namespace llvm; - -//MSchedGraphSBNode constructor -MSchedGraphSBNode::MSchedGraphSBNode(const MachineInstr* inst, - MSchedGraphSB *graph, unsigned idx, - unsigned late, bool isBranch) - : Inst(inst), Parent(graph), index(idx), latency(late), - isBranchInstr(isBranch) { - - //Add to the graph - graph->addNode(inst, this); -} - -//MSchedGraphSBNode constructor -MSchedGraphSBNode::MSchedGraphSBNode(const MachineInstr* inst, - std::vector<const MachineInstr*> &other, - MSchedGraphSB *graph, unsigned idx, - unsigned late, bool isPNode) - : Inst(inst), otherInstrs(other), Parent(graph), index(idx), latency(late), isPredicateNode(isPNode) { - - - isBranchInstr = false; - - //Add to the graph - graph->addNode(inst, this); -} - -//MSchedGraphSBNode copy constructor -MSchedGraphSBNode::MSchedGraphSBNode(const MSchedGraphSBNode &N) - : Predecessors(N.Predecessors), Successors(N.Successors) { - - Inst = N.Inst; - Parent = N.Parent; - index = N.index; - latency = N.latency; - isBranchInstr = N.isBranchInstr; - otherInstrs = N.otherInstrs; -} - -//Print the node (instruction and latency) -void MSchedGraphSBNode::print(std::ostream &os) const { - if(!isPredicate()) - os << "MSchedGraphSBNode: Inst=" << *Inst << ", latency= " << latency << "\n"; - else - os << "Pred Node\n"; -} - - -//Get the edge from a predecessor to this node -MSchedGraphSBEdge MSchedGraphSBNode::getInEdge(MSchedGraphSBNode *pred) { - //Loop over all the successors of our predecessor - //return the edge the corresponds to this in edge - for (MSchedGraphSBNode::succ_iterator I = pred->succ_begin(), - E = pred->succ_end(); I != E; ++I) { - if (*I == this) - return I.getEdge(); - } - assert(0 && "Should have found edge between this node and its predecessor!"); - abort(); -} - -//Get the iteration difference for the edge from this node to its successor -unsigned MSchedGraphSBNode::getIteDiff(MSchedGraphSBNode *succ) { - for(std::vector<MSchedGraphSBEdge>::iterator I = Successors.begin(), - E = Successors.end(); - I != E; ++I) { - if(I->getDest() == succ) - return I->getIteDiff(); - } - return 0; -} - -//Get the index into the vector of edges for the edge from pred to this node -unsigned MSchedGraphSBNode::getInEdgeNum(MSchedGraphSBNode *pred) { - //Loop over all the successors of our predecessor - //return the edge the corresponds to this in edge - int count = 0; - for(MSchedGraphSBNode::succ_iterator I = pred->succ_begin(), - E = pred->succ_end(); - I != E; ++I) { - if(*I == this) - return count; - count++; - } - assert(0 && "Should have found edge between this node and its predecessor!"); - abort(); -} - -//Determine if succ is a successor of this node -bool MSchedGraphSBNode::isSuccessor(MSchedGraphSBNode *succ) { - for(succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I) - if(*I == succ) - return true; - return false; -} - -//Dtermine if pred is a predecessor of this node -bool MSchedGraphSBNode::isPredecessor(MSchedGraphSBNode *pred) { - if(std::find( Predecessors.begin(), Predecessors.end(), - pred) != Predecessors.end()) - return true; - else - return false; -} - -//Add a node to the graph -void MSchedGraphSB::addNode(const MachineInstr* MI, - MSchedGraphSBNode *node) { - - //Make sure node does not already exist - assert(GraphMap.find(MI) == GraphMap.end() - && "New MSchedGraphSBNode already exists for this instruction"); - - GraphMap[MI] = node; -} - -//Delete a node to the graph -void MSchedGraphSB::deleteNode(MSchedGraphSBNode *node) { - - //Delete the edge to this node from all predecessors - while(node->pred_size() > 0) { - //DEBUG(std::cerr << "Delete edge from: " << **P << " to " << *node << "\n"); - MSchedGraphSBNode *pred = *(node->pred_begin()); - pred->deleteSuccessor(node); - } - - //Remove this node from the graph - GraphMap.erase(node->getInst()); - -} - - -//Create a graph for a machine block. The ignoreInstrs map is so that -//we ignore instructions associated to the index variable since this -//is a special case in Modulo Scheduling. We only want to deal with -//the body of the loop. -MSchedGraphSB::MSchedGraphSB(std::vector<const MachineBasicBlock*> &bbs, - const TargetMachine &targ, - std::map<const MachineInstr*, unsigned> &ignoreInstrs, - DependenceAnalyzer &DA, - std::map<MachineInstr*, Instruction*> &machineTollvm) - : BBs(bbs), Target(targ) { - - //Make sure there is at least one BB and it is not null, - assert(((bbs.size() >= 1) && bbs[1] != NULL) && "Basic Block is null"); - - std::map<MSchedGraphSBNode*, std::set<MachineInstr*> > liveOutsideTrace; - std::set<const BasicBlock*> llvmBBs; - - for(std::vector<const MachineBasicBlock*>::iterator MBB = bbs.begin(), ME = bbs.end()-1; - MBB != ME; ++MBB) - llvmBBs.insert((*MBB)->getBasicBlock()); - - //create predicate nodes - DEBUG(std::cerr << "Create predicate nodes\n"); - for(std::vector<const MachineBasicBlock*>::iterator MBB = bbs.begin(), ME = bbs.end()-1; - MBB != ME; ++MBB) { - //Get LLVM basic block - BasicBlock *BB = (BasicBlock*) (*MBB)->getBasicBlock(); - - //Get Terminator - BranchInst *b = dyn_cast<BranchInst>(BB->getTerminator()); - - std::vector<const MachineInstr*> otherInstrs; - MachineInstr *instr = 0; - - //Get the condition for the branch (we already checked if it was conditional) - if(b->isConditional()) { - - Value *cond = b->getCondition(); - - DEBUG(std::cerr << "Condition: " << *cond << "\n"); - - assert(cond && "Condition must not be null!"); - - if(Instruction *I = dyn_cast<Instruction>(cond)) { - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(I); - if(tempMvec.size() > 0) { - DEBUG(std::cerr << *(tempMvec[tempMvec.size()-1]) << "\n");; - instr = (MachineInstr*) tempMvec[tempMvec.size()-1]; - } - } - } - - //Get Machine target information for calculating latency - const TargetInstrInfo *MTI = Target.getInstrInfo(); - - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(b); - int offset = tempMvec.size(); - for (unsigned j = 0; j < tempMvec.size(); j++) { - MachineInstr *mi = tempMvec[j]; - if(MTI->isNop(mi->getOpcode())) - continue; - - if(!instr) { - instr = mi; - DEBUG(std::cerr << "No Cond MI: " << *mi << "\n"); - } - else { - DEBUG(std::cerr << *mi << "\n");; - otherInstrs.push_back(mi); - } - } - - //Node is created and added to the graph automatically - MSchedGraphSBNode *node = new MSchedGraphSBNode(instr, otherInstrs, this, (*MBB)->size()-offset-1, 3, true); - - DEBUG(std::cerr << "Created Node: " << *node << "\n"); - - //Now loop over all instructions and see if their def is live outside the trace - MachineBasicBlock *mb = (MachineBasicBlock*) *MBB; - for(MachineBasicBlock::iterator I = mb->begin(), E = mb->end(); I != E; ++I) { - MachineInstr *instr = I; - if(MTI->isNop(instr->getOpcode()) || MTI->isBranch(instr->getOpcode())) - continue; - if(node->getInst() == instr) - continue; - - for(unsigned i=0; i < instr->getNumOperands(); ++i) { - MachineOperand &mOp = instr->getOperand(i); - if(mOp.isDef() && mOp.getType() == MachineOperand::MO_VirtualRegister) { - Value *val = mOp.getVRegValue(); - //Check if there is a use not in the trace - for(Value::use_iterator V = val->use_begin(), VE = val->use_end(); V != VE; ++V) { - if (Instruction *Inst = dyn_cast<Instruction>(*V)) { - if(llvmBBs.count(Inst->getParent())) - liveOutsideTrace[node].insert(instr); - } - } - } - } - } - - - } - - //Create nodes and edges for this BB - buildNodesAndEdges(ignoreInstrs, DA, machineTollvm, liveOutsideTrace); - -} - - -//Copies the graph and keeps a map from old to new nodes -MSchedGraphSB::MSchedGraphSB(const MSchedGraphSB &G, - std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes) - : Target(G.Target) { - - BBs = G.BBs; - - std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> oldToNew; - //Copy all nodes - for(MSchedGraphSB::const_iterator N = G.GraphMap.begin(), - NE = G.GraphMap.end(); N != NE; ++N) { - - MSchedGraphSBNode *newNode = new MSchedGraphSBNode(*(N->second)); - oldToNew[&*(N->second)] = newNode; - newNodes[newNode] = &*(N->second); - GraphMap[&*(N->first)] = newNode; - } - - //Loop over nodes and update edges to point to new nodes - for(MSchedGraphSB::iterator N = GraphMap.begin(), NE = GraphMap.end(); - N != NE; ++N) { - - //Get the node we are dealing with - MSchedGraphSBNode *node = &*(N->second); - - node->setParent(this); - - //Loop over nodes successors and predecessors and update to the new nodes - for(unsigned i = 0; i < node->pred_size(); ++i) { - node->setPredecessor(i, oldToNew[node->getPredecessor(i)]); - } - - for(unsigned i = 0; i < node->succ_size(); ++i) { - MSchedGraphSBEdge *edge = node->getSuccessor(i); - MSchedGraphSBNode *oldDest = edge->getDest(); - edge->setDest(oldToNew[oldDest]); - } - } -} - -//Deconstructor, deletes all nodes in the graph -MSchedGraphSB::~MSchedGraphSB () { - for(MSchedGraphSB::iterator I = GraphMap.begin(), E = GraphMap.end(); - I != E; ++I) - delete I->second; -} - -//Print out graph -void MSchedGraphSB::print(std::ostream &os) const { - for(MSchedGraphSB::const_iterator N = GraphMap.begin(), NE = GraphMap.end(); - N != NE; ++N) { - - //Get the node we are dealing with - MSchedGraphSBNode *node = &*(N->second); - - os << "Node Start\n"; - node->print(os); - os << "Successors:\n"; - //print successors - for(unsigned i = 0; i < node->succ_size(); ++i) { - MSchedGraphSBEdge *edge = node->getSuccessor(i); - MSchedGraphSBNode *oldDest = edge->getDest(); - oldDest->print(os); - } - os << "Node End\n"; - } -} - -//Calculate total delay -int MSchedGraphSB::totalDelay() { - int sum = 0; - - for(MSchedGraphSB::const_iterator N = GraphMap.begin(), NE = GraphMap.end(); - N != NE; ++N) { - - //Get the node we are dealing with - MSchedGraphSBNode *node = &*(N->second); - sum += node->getLatency(); - } - return sum; -} - -bool MSchedGraphSB::instrCauseException(MachineOpCode opCode) { - //Check for integer divide - if(opCode == V9::SDIVXr || opCode == V9::SDIVXi - || opCode == V9::UDIVXr || opCode == V9::UDIVXi) - return true; - - //Check for loads or stores - const TargetInstrInfo *MTI = Target.getInstrInfo(); - //if( MTI->isLoad(opCode) || - if(MTI->isStore(opCode)) - return true; - - //Check for any floating point operation - const TargetSchedInfo *msi = Target.getSchedInfo(); - InstrSchedClass sc = msi->getSchedClass(opCode); - - //FIXME: Should check for floating point instructions! - //if(sc == SPARC_FGA || sc == SPARC_FGM) - //return true; - - return false; -} - - -//Add edges between the nodes -void MSchedGraphSB::buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ignoreInstrs, - DependenceAnalyzer &DA, - std::map<MachineInstr*, Instruction*> &machineTollvm, - std::map<MSchedGraphSBNode*, std::set<MachineInstr*> > &liveOutsideTrace) { - - - //Get Machine target information for calculating latency - const TargetInstrInfo *MTI = Target.getInstrInfo(); - - std::vector<MSchedGraphSBNode*> memInstructions; - std::map<int, std::vector<OpIndexNodePair> > regNumtoNodeMap; - std::map<const Value*, std::vector<OpIndexNodePair> > valuetoNodeMap; - - //Save PHI instructions to deal with later - std::vector<const MachineInstr*> phiInstrs; - unsigned index = 0; - - MSchedGraphSBNode *lastPred = 0; - - - for(std::vector<const MachineBasicBlock*>::iterator B = BBs.begin(), - BE = BBs.end(); B != BE; ++B) { - - const MachineBasicBlock *BB = *B; - - - //Loop over instructions in MBB and add nodes and edges - for (MachineBasicBlock::const_iterator MI = BB->begin(), e = BB->end(); - MI != e; ++MI) { - - //Ignore indvar instructions - if(ignoreInstrs.count(MI)) { - ++index; - continue; - } - - //Get each instruction of machine basic block, get the delay - //using the op code, create a new node for it, and add to the - //graph. - - MachineOpCode opCode = MI->getOpcode(); - int delay; - - //Get delay - delay = MTI->maxLatency(opCode); - - //Create new node for this machine instruction and add to the graph. - //Create only if not a nop - if(MTI->isNop(opCode)) - continue; - - //Sparc BE does not use PHI opcode, so assert on this case - assert(opCode != TargetInstrInfo::PHI && "Did not expect PHI opcode"); - - bool isBranch = false; - - //Skip branches - if(MTI->isBranch(opCode)) - continue; - - //Node is created and added to the graph automatically - MSchedGraphSBNode *node = 0; - if(!GraphMap.count(MI)){ - node = new MSchedGraphSBNode(MI, this, index, delay); - DEBUG(std::cerr << "Created Node: " << *node << "\n"); - } - else { - node = GraphMap[MI]; - if(node->isPredicate()) { - //Create edge between this node and last pred, then switch to new pred - if(lastPred) { - lastPred->addOutEdge(node, MSchedGraphSBEdge::PredDep, - MSchedGraphSBEdge::NonDataDep, 0); - - if(liveOutsideTrace.count(lastPred)) { - for(std::set<MachineInstr*>::iterator L = liveOutsideTrace[lastPred].begin(), LE = liveOutsideTrace[lastPred].end(); L != LE; ++L) - lastPred->addOutEdge(GraphMap[*L], MSchedGraphSBEdge::PredDep, - MSchedGraphSBEdge::NonDataDep, 1); - } - - } - - lastPred = node; - } - } - - //Add dependencies to instructions that cause exceptions - if(lastPred) - lastPred->print(std::cerr); - - if(!node->isPredicate() && instrCauseException(opCode)) { - if(lastPred) { - lastPred->addOutEdge(node, MSchedGraphSBEdge::PredDep, - MSchedGraphSBEdge::NonDataDep, 0); - } - } - - - //Check OpCode to keep track of memory operations to add memory - //dependencies later. - if(MTI->isLoad(opCode) || MTI->isStore(opCode)) - memInstructions.push_back(node); - - //Loop over all operands, and put them into the register number to - //graph node map for determining dependencies - //If an operands is a use/def, we have an anti dependence to itself - for(unsigned i=0; i < MI->getNumOperands(); ++i) { - //Get Operand - const MachineOperand &mOp = MI->getOperand(i); - - //Check if it has an allocated register - if(mOp.hasAllocatedReg()) { - int regNum = mOp.getReg(); - - if(regNum != SparcV9::g0) { - //Put into our map - regNumtoNodeMap[regNum].push_back(std::make_pair(i, node)); - } - continue; - } - - - //Add virtual registers dependencies - //Check if any exist in the value map already and create dependencies - //between them. - if(mOp.getType() == MachineOperand::MO_VirtualRegister - || mOp.getType() == MachineOperand::MO_CCRegister) { - - //Make sure virtual register value is not null - assert((mOp.getVRegValue() != NULL) && "Null value is defined"); - - //Check if this is a read operation in a phi node, if so DO NOT PROCESS - if(mOp.isUse() && (opCode == TargetInstrInfo::PHI)) { - DEBUG(std::cerr << "Read Operation in a PHI node\n"); - continue; - } - - if (const Value* srcI = mOp.getVRegValue()) { - - //Find value in the map - std::map<const Value*, std::vector<OpIndexNodePair> >::iterator V - = valuetoNodeMap.find(srcI); - - //If there is something in the map already, add edges from - //those instructions - //to this one we are processing - if(V != valuetoNodeMap.end()) { - addValueEdges(V->second, node, mOp.isUse(), mOp.isDef(), phiInstrs); - - //Add to value map - V->second.push_back(std::make_pair(i,node)); - } - //Otherwise put it in the map - else - //Put into value map - valuetoNodeMap[mOp.getVRegValue()].push_back(std::make_pair(i, node)); - } - } - } - ++index; - } - - //Loop over LLVM BB, examine phi instructions, and add them to our - //phiInstr list to process - const BasicBlock *llvm_bb = BB->getBasicBlock(); - for(BasicBlock::const_iterator I = llvm_bb->begin(), E = llvm_bb->end(); - I != E; ++I) { - if(const PHINode *PN = dyn_cast<PHINode>(I)) { - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(PN); - for (unsigned j = 0; j < tempMvec.size(); j++) { - if(!ignoreInstrs.count(tempMvec[j])) { - DEBUG(std::cerr << "Inserting phi instr into map: " << *tempMvec[j] << "\n"); - phiInstrs.push_back((MachineInstr*) tempMvec[j]); - } - } - } - - } - - addMemEdges(memInstructions, DA, machineTollvm); - addMachRegEdges(regNumtoNodeMap); - - //Finally deal with PHI Nodes and Value* - for(std::vector<const MachineInstr*>::iterator I = phiInstrs.begin(), - E = phiInstrs.end(); I != E; ++I) { - - //Get Node for this instruction - std::map<const MachineInstr*, MSchedGraphSBNode*>::iterator X; - X = find(*I); - - if(X == GraphMap.end()) - continue; - - MSchedGraphSBNode *node = X->second; - - DEBUG(std::cerr << "Adding ite diff edges for node: " << *node << "\n"); - - //Loop over operands for this instruction and add value edges - for(unsigned i=0; i < (*I)->getNumOperands(); ++i) { - //Get Operand - const MachineOperand &mOp = (*I)->getOperand(i); - if((mOp.getType() == MachineOperand::MO_VirtualRegister - || mOp.getType() == MachineOperand::MO_CCRegister) && mOp.isUse()) { - - //find the value in the map - if (const Value* srcI = mOp.getVRegValue()) { - - //Find value in the map - std::map<const Value*, std::vector<OpIndexNodePair> >::iterator V - = valuetoNodeMap.find(srcI); - - //If there is something in the map already, add edges from - //those instructions - //to this one we are processing - if(V != valuetoNodeMap.end()) { - addValueEdges(V->second, node, mOp.isUse(), mOp.isDef(), - phiInstrs, 1); - } - } - } - } - } - } -} -//Add dependencies for Value*s -void MSchedGraphSB::addValueEdges(std::vector<OpIndexNodePair> &NodesInMap, - MSchedGraphSBNode *destNode, bool nodeIsUse, - bool nodeIsDef, std::vector<const MachineInstr*> &phiInstrs, int diff) { - - for(std::vector<OpIndexNodePair>::iterator I = NodesInMap.begin(), - E = NodesInMap.end(); I != E; ++I) { - - //Get node in vectors machine operand that is the same value as node - MSchedGraphSBNode *srcNode = I->second; - MachineOperand mOp = srcNode->getInst()->getOperand(I->first); - - if(diff > 0) - if(std::find(phiInstrs.begin(), phiInstrs.end(), srcNode->getInst()) == phiInstrs.end()) - continue; - - //Node is a Def, so add output dep. - if(nodeIsDef) { - if(mOp.isUse()) { - DEBUG(std::cerr << "Edge from " << *srcNode << " to " << *destNode << " (itediff=" << diff << ", type=anti)\n"); - srcNode->addOutEdge(destNode, MSchedGraphSBEdge::ValueDep, - MSchedGraphSBEdge::AntiDep, diff); - } - if(mOp.isDef()) { - DEBUG(std::cerr << "Edge from " << *srcNode << " to " << *destNode << " (itediff=" << diff << ", type=output)\n"); - srcNode->addOutEdge(destNode, MSchedGraphSBEdge::ValueDep, - MSchedGraphSBEdge::OutputDep, diff); - } - } - if(nodeIsUse) { - if(mOp.isDef()) { - DEBUG(std::cerr << "Edge from " << *srcNode << " to " << *destNode << " (itediff=" << diff << ", type=true)\n"); - srcNode->addOutEdge(destNode, MSchedGraphSBEdge::ValueDep, - MSchedGraphSBEdge::TrueDep, diff); - } - } - } -} - -//Add dependencies for machine registers across iterations -void MSchedGraphSB::addMachRegEdges(std::map<int, std::vector<OpIndexNodePair> >& regNumtoNodeMap) { - //Loop over all machine registers in the map, and add dependencies - //between the instructions that use it - typedef std::map<int, std::vector<OpIndexNodePair> > regNodeMap; - for(regNodeMap::iterator I = regNumtoNodeMap.begin(); - I != regNumtoNodeMap.end(); ++I) { - //Get the register number - int regNum = (*I).first; - - //Get Vector of nodes that use this register - std::vector<OpIndexNodePair> Nodes = (*I).second; - - //Loop over nodes and determine the dependence between the other - //nodes in the vector - for(unsigned i =0; i < Nodes.size(); ++i) { - - //Get src node operator index that uses this machine register - int srcOpIndex = Nodes[i].first; - - //Get the actual src Node - MSchedGraphSBNode *srcNode = Nodes[i].second; - - //Get Operand - const MachineOperand &srcMOp = srcNode->getInst()->getOperand(srcOpIndex); - - bool srcIsUseandDef = srcMOp.isDef() && srcMOp.isUse(); - bool srcIsUse = srcMOp.isUse() && !srcMOp.isDef(); - - - //Look at all instructions after this in execution order - for(unsigned j=i+1; j < Nodes.size(); ++j) { - - //Sink node is a write - if(Nodes[j].second->getInst()->getOperand(Nodes[j].first).isDef()) { - //Src only uses the register (read) - if(srcIsUse) - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::AntiDep); - - else if(srcIsUseandDef) { - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::AntiDep); - - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::OutputDep); - } - else - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::OutputDep); - } - //Dest node is a read - else { - if(!srcIsUse || srcIsUseandDef) - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::TrueDep); - } - - } - - //Look at all the instructions before this one since machine registers - //could live across iterations. - for(unsigned j = 0; j < i; ++j) { - //Sink node is a write - if(Nodes[j].second->getInst()->getOperand(Nodes[j].first).isDef()) { - //Src only uses the register (read) - if(srcIsUse) - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::AntiDep, 1); - else if(srcIsUseandDef) { - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::AntiDep, 1); - - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::OutputDep, 1); - } - else - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::OutputDep, 1); - } - //Dest node is a read - else { - if(!srcIsUse || srcIsUseandDef) - srcNode->addOutEdge(Nodes[j].second, - MSchedGraphSBEdge::MachineRegister, - MSchedGraphSBEdge::TrueDep,1 ); - } - - - } - - } - - } - -} - -//Add edges between all loads and stores -//Can be less strict with alias analysis and data dependence analysis. -void MSchedGraphSB::addMemEdges(const std::vector<MSchedGraphSBNode*>& memInst, - DependenceAnalyzer &DA, - std::map<MachineInstr*, Instruction*> &machineTollvm) { - - //Get Target machine instruction info - const TargetInstrInfo *TMI = Target.getInstrInfo(); - - //Loop over all memory instructions in the vector - //Knowing that they are in execution, add true, anti, and output dependencies - for (unsigned srcIndex = 0; srcIndex < memInst.size(); ++srcIndex) { - - MachineInstr *srcInst = (MachineInstr*) memInst[srcIndex]->getInst(); - - //Get the machine opCode to determine type of memory instruction - MachineOpCode srcNodeOpCode = srcInst->getOpcode(); - - //All instructions after this one in execution order have an - //iteration delay of 0 - for(unsigned destIndex = 0; destIndex < memInst.size(); ++destIndex) { - - //No self loops - if(destIndex == srcIndex) - continue; - - MachineInstr *destInst = (MachineInstr*) memInst[destIndex]->getInst(); - - DEBUG(std::cerr << "MInst1: " << *srcInst << "\n"); - DEBUG(std::cerr << "MInst2: " << *destInst << "\n"); - - //Assuming instructions without corresponding llvm instructions - //are from constant pools. - if (!machineTollvm.count(srcInst) || !machineTollvm.count(destInst)) - continue; - - bool useDepAnalyzer = true; - - //Some machine loads and stores are generated by casts, so be - //conservative and always add deps - Instruction *srcLLVM = machineTollvm[srcInst]; - Instruction *destLLVM = machineTollvm[destInst]; - if(!isa<LoadInst>(srcLLVM) - && !isa<StoreInst>(srcLLVM)) { - if(isa<BinaryOperator>(srcLLVM)) { - if(isa<ConstantFP>(srcLLVM->getOperand(0)) || isa<ConstantFP>(srcLLVM->getOperand(1))) - continue; - } - useDepAnalyzer = false; - } - if(!isa<LoadInst>(destLLVM) - && !isa<StoreInst>(destLLVM)) { - if(isa<BinaryOperator>(destLLVM)) { - if(isa<ConstantFP>(destLLVM->getOperand(0)) || isa<ConstantFP>(destLLVM->getOperand(1))) - continue; - } - useDepAnalyzer = false; - } - - //Use dep analysis when we have corresponding llvm loads/stores - if(useDepAnalyzer) { - bool srcBeforeDest = true; - if(destIndex < srcIndex) - srcBeforeDest = false; - - DependenceResult dr = DA.getDependenceInfo(machineTollvm[srcInst], - machineTollvm[destInst], - srcBeforeDest); - - for(std::vector<Dependence>::iterator d = dr.dependences.begin(), - de = dr.dependences.end(); d != de; ++d) { - //Add edge from load to store - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphSBEdge::MemoryDep, - d->getDepType(), d->getIteDiff()); - - } - } - //Otherwise, we can not do any further analysis and must make a dependence - else { - - //Get the machine opCode to determine type of memory instruction - MachineOpCode destNodeOpCode = destInst->getOpcode(); - - //Get the Value* that we are reading from the load, always the first op - const MachineOperand &mOp = srcInst->getOperand(0); - const MachineOperand &mOp2 = destInst->getOperand(0); - - if(mOp.hasAllocatedReg()) - if(mOp.getReg() == SparcV9::g0) - continue; - if(mOp2.hasAllocatedReg()) - if(mOp2.getReg() == SparcV9::g0) - continue; - - DEBUG(std::cerr << "Adding dependence for machine instructions\n"); - //Load-Store deps - if(TMI->isLoad(srcNodeOpCode)) { - - if(TMI->isStore(destNodeOpCode)) - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphSBEdge::MemoryDep, - MSchedGraphSBEdge::AntiDep, 0); - } - else if(TMI->isStore(srcNodeOpCode)) { - if(TMI->isStore(destNodeOpCode)) - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphSBEdge::MemoryDep, - MSchedGraphSBEdge::OutputDep, 0); - - else - memInst[srcIndex]->addOutEdge(memInst[destIndex], - MSchedGraphSBEdge::MemoryDep, - MSchedGraphSBEdge::TrueDep, 0); - } - } - } - } -} diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraphSB.h b/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraphSB.h deleted file mode 100644 index 2e43f7ed6f6..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraphSB.h +++ /dev/null @@ -1,410 +0,0 @@ -//===-- MSchedGraphSB.h - Scheduling Graph ------------------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// A graph class for dependencies. This graph only contains true, anti, and -// output data dependencies for a vector of MachineBasicBlock. Dependencies -// across iterations are also computed. Unless data dependence analysis -// is provided, a conservative approach of adding dependencies between all -// loads and stores is taken. It also includes pseudo predicate nodes for -// modulo scheduling superblocks. -//===----------------------------------------------------------------------===// - -#ifndef LLVM_MSCHEDGRAPHSB_H -#define LLVM_MSCHEDGRAPHSB_H -#include "DependenceAnalyzer.h" -#include "llvm/Analysis/AliasAnalysis.h" -#include "llvm/CodeGen/MachineInstr.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetData.h" -#include "llvm/ADT/GraphTraits.h" -#include "llvm/ADT/STLExtras.h" -#include "llvm/ADT/iterator" -#include <vector> - - -namespace llvm { - - class MSchedGraphSB; - class MSchedGraphSBNode; - template<class IteratorType, class NodeType> - class MSchedGraphSBNodeIterator; - - //MSchedGraphSBEdge encapsulates the data dependence between nodes. It - //identifies the dependence type, on what, and the iteration - //difference - struct MSchedGraphSBEdge { - enum DataDepOrderType { - TrueDep, AntiDep, OutputDep, NonDataDep - }; - - enum MSchedGraphSBEdgeType { - MemoryDep, ValueDep, MachineRegister, PredDep - }; - - //Get or set edge data - MSchedGraphSBNode *getDest() const { return dest; } - unsigned getIteDiff() { return iteDiff; } - unsigned getDepOrderType() { return depOrderType; } - void setDest(MSchedGraphSBNode *newDest) { dest = newDest; } - - private: - friend class MSchedGraphSBNode; - MSchedGraphSBEdge(MSchedGraphSBNode *destination, MSchedGraphSBEdgeType type, - unsigned deptype, unsigned diff) - : dest(destination), depType(type), depOrderType(deptype), iteDiff(diff) {} - - MSchedGraphSBNode *dest; - MSchedGraphSBEdgeType depType; - unsigned depOrderType; - unsigned iteDiff; - }; - - //MSchedGraphSBNode represents a machine instruction and its - //corresponding latency. Each node also contains a list of its - //predecessors and sucessors. - class MSchedGraphSBNode { - - const MachineInstr* Inst; //Machine Instruction - std::vector<const MachineInstr*> otherInstrs; - - MSchedGraphSB* Parent; //Graph this node belongs to - unsigned index; //Index in BB - unsigned latency; //Latency of Instruction - bool isBranchInstr; //Is this node the branch instr or not - bool isPredicateNode; //Indicate if this node should be treated like a predicate - - std::vector<MSchedGraphSBNode*> Predecessors; //Predecessor Nodes - std::vector<MSchedGraphSBEdge> Successors; //Successor edges - - public: - MSchedGraphSBNode(const MachineInstr* inst, MSchedGraphSB *graph, - unsigned index, unsigned late=0, bool isBranch=false); - MSchedGraphSBNode(const MachineInstr* inst, std::vector<const MachineInstr*> &other, - MSchedGraphSB *graph, - unsigned index, unsigned late=0, bool isPNode=true); - MSchedGraphSBNode(const MSchedGraphSBNode &N); - - //Iterators - Predecessor and Succussor - typedef std::vector<MSchedGraphSBNode*>::iterator pred_iterator; - pred_iterator pred_begin() { return Predecessors.begin(); } - pred_iterator pred_end() { return Predecessors.end(); } - unsigned pred_size() { return Predecessors.size(); } - - typedef std::vector<MSchedGraphSBNode*>::const_iterator pred_const_iterator; - pred_const_iterator pred_begin() const { return Predecessors.begin(); } - pred_const_iterator pred_end() const { return Predecessors.end(); } - - typedef MSchedGraphSBNodeIterator<std::vector<MSchedGraphSBEdge>::const_iterator, - const MSchedGraphSBNode> succ_const_iterator; - succ_const_iterator succ_begin() const; - succ_const_iterator succ_end() const; - - typedef MSchedGraphSBNodeIterator<std::vector<MSchedGraphSBEdge>::iterator, - MSchedGraphSBNode> succ_iterator; - succ_iterator succ_begin(); - succ_iterator succ_end(); - unsigned succ_size() { return Successors.size(); } - - //Get or set predecessor nodes, or successor edges - void setPredecessor(unsigned index, MSchedGraphSBNode *dest) { - Predecessors[index] = dest; - } - - MSchedGraphSBNode* getPredecessor(unsigned index) { - return Predecessors[index]; - } - - MSchedGraphSBEdge* getSuccessor(unsigned index) { - return &Successors[index]; - } - - void deleteSuccessor(MSchedGraphSBNode *node) { - for (unsigned i = 0; i != Successors.size(); ++i) - if (Successors[i].getDest() == node) { - Successors.erase(Successors.begin()+i); - node->Predecessors.erase(std::find(node->Predecessors.begin(), - node->Predecessors.end(), this)); - --i; //Decrease index var since we deleted a node - } - } - - void addOutEdge(MSchedGraphSBNode *destination, - MSchedGraphSBEdge::MSchedGraphSBEdgeType type, - unsigned deptype, unsigned diff=0) { - Successors.push_back(MSchedGraphSBEdge(destination, type, deptype,diff)); - destination->Predecessors.push_back(this); - } - - //General methods to get and set data for the node - const MachineInstr* getInst() { return Inst; } - MSchedGraphSB* getParent() { return Parent; } - bool hasPredecessors() { return (Predecessors.size() > 0); } - bool hasSuccessors() { return (Successors.size() > 0); } - unsigned getLatency() { return latency; } - unsigned getLatency() const { return latency; } - unsigned getIndex() { return index; } - unsigned getIteDiff(MSchedGraphSBNode *succ); - MSchedGraphSBEdge getInEdge(MSchedGraphSBNode *pred); - unsigned getInEdgeNum(MSchedGraphSBNode *pred); - bool isSuccessor(MSchedGraphSBNode *); - bool isPredecessor(MSchedGraphSBNode *); - bool isBranch() { return isBranchInstr; } - bool isPredicate() { return isPredicateNode; } - bool isPredicate() const { return isPredicateNode; } - std::vector<const MachineInstr*> getOtherInstrs() { return otherInstrs; } - - //Debug support - void print(std::ostream &os) const; - void setParent(MSchedGraphSB *p) { Parent = p; } - }; - - //Node iterator for graph generation - template<class IteratorType, class NodeType> - class MSchedGraphSBNodeIterator : public forward_iterator<NodeType*, ptrdiff_t> { - IteratorType I; // std::vector<MSchedGraphSBEdge>::iterator or const_iterator - public: - MSchedGraphSBNodeIterator(IteratorType i) : I(i) {} - - bool operator==(const MSchedGraphSBNodeIterator RHS) const { return I == RHS.I; } - bool operator!=(const MSchedGraphSBNodeIterator RHS) const { return I != RHS.I; } - - const MSchedGraphSBNodeIterator &operator=(const MSchedGraphSBNodeIterator &RHS) { - I = RHS.I; - return *this; - } - - NodeType* operator*() const { - return I->getDest(); - } - NodeType* operator->() const { return operator*(); } - - MSchedGraphSBNodeIterator& operator++() { // Preincrement - ++I; - return *this; - } - MSchedGraphSBNodeIterator operator++(int) { // Postincrement - MSchedGraphSBNodeIterator tmp = *this; ++*this; return tmp; - } - - MSchedGraphSBEdge &getEdge() { - return *I; - } - const MSchedGraphSBEdge &getEdge() const { - return *I; - } - }; - - inline MSchedGraphSBNode::succ_const_iterator MSchedGraphSBNode::succ_begin() const { - return succ_const_iterator(Successors.begin()); - } - inline MSchedGraphSBNode::succ_const_iterator MSchedGraphSBNode::succ_end() const { - return succ_const_iterator(Successors.end()); - } - inline MSchedGraphSBNode::succ_iterator MSchedGraphSBNode::succ_begin() { - return succ_iterator(Successors.begin()); - } - inline MSchedGraphSBNode::succ_iterator MSchedGraphSBNode::succ_end() { - return succ_iterator(Successors.end()); - } - - // ostream << operator for MSGraphNode class - inline std::ostream &operator<<(std::ostream &os, - const MSchedGraphSBNode &node) { - node.print(os); - return os; - } - - - // Provide specializations of GraphTraits to be able to use graph - // iterators on the scheduling graph! - // - template <> struct GraphTraits<MSchedGraphSBNode*> { - typedef MSchedGraphSBNode NodeType; - typedef MSchedGraphSBNode::succ_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->succ_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->succ_end(); - } - - static NodeType *getEntryNode(NodeType* N) { return N; } - }; - - - - //Graph class to represent dependence graph - class MSchedGraphSB { - - std::vector<const MachineBasicBlock *> BBs; //Machine basic block - const TargetMachine &Target; //Target Machine - - //Nodes - std::map<const MachineInstr*, MSchedGraphSBNode*> GraphMap; - - //Add Nodes and Edges to this graph for our BB - typedef std::pair<int, MSchedGraphSBNode*> OpIndexNodePair; - void buildNodesAndEdges(std::map<const MachineInstr*, unsigned> &ignoreInstrs, DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm, std::map<MSchedGraphSBNode*, std::set<MachineInstr*> > &liveOutsideTrace); - void addValueEdges(std::vector<OpIndexNodePair> &NodesInMap, - MSchedGraphSBNode *node, - bool nodeIsUse, bool nodeIsDef, std::vector<const MachineInstr*> &phiInstrs, int diff=0); - void addMachRegEdges(std::map<int, - std::vector<OpIndexNodePair> >& regNumtoNodeMap); - void addMemEdges(const std::vector<MSchedGraphSBNode*>& memInst, - DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm); - - - bool instrCauseException(MachineOpCode opCode); - - public: - MSchedGraphSB(const MachineBasicBlock *bb, const TargetMachine &targ, - std::map<const MachineInstr*, unsigned> &ignoreInstrs, - DependenceAnalyzer &DA, std::map<MachineInstr*, Instruction*> &machineTollvm); - - //Copy constructor with maps to link old nodes to new nodes - MSchedGraphSB(const MSchedGraphSB &G, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes); - - MSchedGraphSB(std::vector<const MachineBasicBlock*> &bbs, - const TargetMachine &targ, - std::map<const MachineInstr*, unsigned> &ignoreInstrs, - DependenceAnalyzer &DA, - std::map<MachineInstr*, Instruction*> &machineTollvm); - - //Print graph - void print(std::ostream &os) const; - - //Deconstructor! - ~MSchedGraphSB(); - - //Add or delete nodes from the Graph - void addNode(const MachineInstr* MI, MSchedGraphSBNode *node); - void deleteNode(MSchedGraphSBNode *node); - int totalDelay(); - - //iterators - typedef std::map<const MachineInstr*, MSchedGraphSBNode*>::iterator iterator; - typedef std::map<const MachineInstr*, MSchedGraphSBNode*>::const_iterator const_iterator; - typedef std::map<const MachineInstr*, MSchedGraphSBNode*>::reverse_iterator reverse_iterator; - iterator find(const MachineInstr* I) { return GraphMap.find(I); } - iterator end() { return GraphMap.end(); } - iterator begin() { return GraphMap.begin(); } - unsigned size() { return GraphMap.size(); } - reverse_iterator rbegin() { return GraphMap.rbegin(); } - reverse_iterator rend() { return GraphMap.rend(); } - - //Get Target or original machine basic block - const TargetMachine* getTarget() { return &Target; } - std::vector<const MachineBasicBlock*> getBBs() { return BBs; } - }; - - - - - - // Provide specializations of GraphTraits to be able to use graph - // iterators on the scheduling graph - static MSchedGraphSBNode& getSecond(std::pair<const MachineInstr* const, - MSchedGraphSBNode*> &Pair) { - return *Pair.second; - } - - template <> struct GraphTraits<MSchedGraphSB*> { - typedef MSchedGraphSBNode NodeType; - typedef MSchedGraphSBNode::succ_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->succ_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->succ_end(); - } - - typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, - MSchedGraphSBNode*>&, MSchedGraphSBNode&> DerefFun; - - typedef mapped_iterator<MSchedGraphSB::iterator, DerefFun> nodes_iterator; - static nodes_iterator nodes_begin(MSchedGraphSB *G) { - return map_iterator(((MSchedGraphSB*)G)->begin(), DerefFun(getSecond)); - } - static nodes_iterator nodes_end(MSchedGraphSB *G) { - return map_iterator(((MSchedGraphSB*)G)->end(), DerefFun(getSecond)); - } - - }; - - template <> struct GraphTraits<const MSchedGraphSB*> { - typedef const MSchedGraphSBNode NodeType; - typedef MSchedGraphSBNode::succ_const_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->succ_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->succ_end(); - } - typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, - MSchedGraphSBNode*>&, MSchedGraphSBNode&> DerefFun; - - typedef mapped_iterator<MSchedGraphSB::iterator, DerefFun> nodes_iterator; - static nodes_iterator nodes_begin(MSchedGraphSB *G) { - return map_iterator(((MSchedGraphSB*)G)->begin(), DerefFun(getSecond)); - } - static nodes_iterator nodes_end(MSchedGraphSB *G) { - return map_iterator(((MSchedGraphSB*)G)->end(), DerefFun(getSecond)); - } - }; - - template <> struct GraphTraits<Inverse<MSchedGraphSB*> > { - typedef MSchedGraphSBNode NodeType; - typedef MSchedGraphSBNode::pred_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->pred_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->pred_end(); - } - typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, - MSchedGraphSBNode*>&, MSchedGraphSBNode&> DerefFun; - - typedef mapped_iterator<MSchedGraphSB::iterator, DerefFun> nodes_iterator; - static nodes_iterator nodes_begin(MSchedGraphSB *G) { - return map_iterator(((MSchedGraphSB*)G)->begin(), DerefFun(getSecond)); - } - static nodes_iterator nodes_end(MSchedGraphSB *G) { - return map_iterator(((MSchedGraphSB*)G)->end(), DerefFun(getSecond)); - } - }; - - template <> struct GraphTraits<Inverse<const MSchedGraphSB*> > { - typedef const MSchedGraphSBNode NodeType; - typedef MSchedGraphSBNode::pred_const_iterator ChildIteratorType; - - static inline ChildIteratorType child_begin(NodeType *N) { - return N->pred_begin(); - } - static inline ChildIteratorType child_end(NodeType *N) { - return N->pred_end(); - } - - typedef std::pointer_to_unary_function<std::pair<const MachineInstr* const, - MSchedGraphSBNode*>&, MSchedGraphSBNode&> DerefFun; - - typedef mapped_iterator<MSchedGraphSB::iterator, DerefFun> nodes_iterator; - static nodes_iterator nodes_begin(MSchedGraphSB *G) { - return map_iterator(((MSchedGraphSB*)G)->begin(), DerefFun(getSecond)); - } - static nodes_iterator nodes_end(MSchedGraphSB *G) { - return map_iterator(((MSchedGraphSB*)G)->end(), DerefFun(getSecond)); - } - }; -} - -#endif diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/Makefile b/llvm/lib/Target/SparcV9/ModuloScheduling/Makefile deleted file mode 100644 index 2ec0503a173..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -##===- lib/Target/SparcV9/ModuloScheduling/Makefile --------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file was developed by the LLVM research group and is distributed under -# the University of Illinois Open Source License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../../../.. -DIRS = -LIBRARYNAME = LLVMSparcV9ModuloSched - -include $(LEVEL)/Makefile.common diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp b/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp deleted file mode 100644 index a5e9661f1cd..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp +++ /dev/null @@ -1,2964 +0,0 @@ -//===-- ModuloScheduling.cpp - ModuloScheduling ----------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This ModuloScheduling pass is based on the Swing Modulo Scheduling -// algorithm. -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "ModuloSched" - -#include "ModuloScheduling.h" -#include "llvm/Constants.h" -#include "llvm/Instructions.h" -#include "llvm/Function.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/Passes.h" -#include "llvm/Support/CFG.h" -#include "llvm/Target/TargetSchedInfo.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/GraphWriter.h" -#include "llvm/ADT/SCCIterator.h" -#include "llvm/ADT/StringExtras.h" -#include "llvm/ADT/Statistic.h" -#include "llvm/Support/Timer.h" -#include <cmath> -#include <algorithm> -#include <fstream> -#include <sstream> -#include <utility> -#include <vector> -#include "../MachineCodeForInstruction.h" -#include "../SparcV9TmpInstr.h" -#include "../SparcV9Internals.h" -#include "../SparcV9RegisterInfo.h" -using namespace llvm; - -/// Create ModuloSchedulingPass -/// -FunctionPass *llvm::createModuloSchedulingPass(TargetMachine & targ) { - DEBUG(std::cerr << "Created ModuloSchedulingPass\n"); - return new ModuloSchedulingPass(targ); -} - - -//Graph Traits for printing out the dependence graph -template<typename GraphType> -static void WriteGraphToFile(std::ostream &O, const std::string &GraphName, - const GraphType >) { - std::string Filename = GraphName + ".dot"; - O << "Writing '" << Filename << "'..."; - std::ofstream F(Filename.c_str()); - - if (F.good()) - WriteGraph(F, GT); - else - O << " error opening file for writing!"; - O << "\n"; -}; - - -#if 1 -#define TIME_REGION(VARNAME, DESC) \ - NamedRegionTimer VARNAME(DESC) -#else -#define TIME_REGION(VARNAME, DESC) -#endif - - -//Graph Traits for printing out the dependence graph -namespace llvm { - - //Loop statistics - Statistic<> ValidLoops("modulosched-validLoops", "Number of candidate loops modulo-scheduled"); - Statistic<> JumboBB("modulosched-jumboBB", "Basic Blocks with more then 100 instructions"); - Statistic<> LoopsWithCalls("modulosched-loopCalls", "Loops with calls"); - Statistic<> LoopsWithCondMov("modulosched-loopCondMov", "Loops with conditional moves"); - Statistic<> InvalidLoops("modulosched-invalidLoops", "Loops with unknown trip counts or loop invariant trip counts"); - Statistic<> SingleBBLoops("modulosched-singeBBLoops", "Number of single basic block loops"); - - //Scheduling Statistics - Statistic<> MSLoops("modulosched-schedLoops", "Number of loops successfully modulo-scheduled"); - Statistic<> NoSched("modulosched-noSched", "No schedule"); - Statistic<> SameStage("modulosched-sameStage", "Max stage is 0"); - Statistic<> ResourceConstraint("modulosched-resourceConstraint", "Loops constrained by resources"); - Statistic<> RecurrenceConstraint("modulosched-recurrenceConstraint", "Loops constrained by recurrences"); - Statistic<> FinalIISum("modulosched-finalIISum", "Sum of all final II"); - Statistic<> IISum("modulosched-IISum", "Sum of all theoretical II"); - - template<> - struct DOTGraphTraits<MSchedGraph*> : public DefaultDOTGraphTraits { - static std::string getGraphName(MSchedGraph *F) { - return "Dependence Graph"; - } - - static std::string getNodeLabel(MSchedGraphNode *Node, MSchedGraph *Graph) { - if (Node->getInst()) { - std::stringstream ss; - ss << *(Node->getInst()); - return ss.str(); //((MachineInstr*)Node->getInst()); - } - else - return "No Inst"; - } - static std::string getEdgeSourceLabel(MSchedGraphNode *Node, - MSchedGraphNode::succ_iterator I) { - //Label each edge with the type of dependence - std::string edgelabel = ""; - switch (I.getEdge().getDepOrderType()) { - - case MSchedGraphEdge::TrueDep: - edgelabel = "True"; - break; - - case MSchedGraphEdge::AntiDep: - edgelabel = "Anti"; - break; - - case MSchedGraphEdge::OutputDep: - edgelabel = "Output"; - break; - - default: - edgelabel = "Unknown"; - break; - } - - //FIXME - int iteDiff = I.getEdge().getIteDiff(); - std::string intStr = "(IteDiff: "; - intStr += itostr(iteDiff); - - intStr += ")"; - edgelabel += intStr; - - return edgelabel; - } - }; -} - - -#include <unistd.h> - -/// ModuloScheduling::runOnFunction - main transformation entry point -/// The Swing Modulo Schedule algorithm has three basic steps: -/// 1) Computation and Analysis of the dependence graph -/// 2) Ordering of the nodes -/// 3) Scheduling -/// -bool ModuloSchedulingPass::runOnFunction(Function &F) { - alarm(100); - - bool Changed = false; - int numMS = 0; - - DEBUG(std::cerr << "Creating ModuloSchedGraph for each valid BasicBlock in " + F.getName() + "\n"); - - //Get MachineFunction - MachineFunction &MF = MachineFunction::get(&F); - - DependenceAnalyzer &DA = getAnalysis<DependenceAnalyzer>(); - - - //Worklist - std::vector<MachineBasicBlock*> Worklist; - - //Iterate over BasicBlocks and put them into our worklist if they are valid - for (MachineFunction::iterator BI = MF.begin(); BI != MF.end(); ++BI) - if(MachineBBisValid(BI)) { - if(BI->size() < 100) { - Worklist.push_back(&*BI); - ++ValidLoops; - } - else - ++JumboBB; - - } - - defaultInst = 0; - - DEBUG(if(Worklist.size() == 0) std::cerr << "No single basic block loops in function to ModuloSchedule\n"); - - //Iterate over the worklist and perform scheduling - for(std::vector<MachineBasicBlock*>::iterator BI = Worklist.begin(), - BE = Worklist.end(); BI != BE; ++BI) { - - //Print out BB for debugging - DEBUG(std::cerr << "BB Size: " << (*BI)->size() << "\n"); - DEBUG(std::cerr << "ModuloScheduling BB: \n"; (*BI)->print(std::cerr)); - - //Print out LLVM BB - DEBUG(std::cerr << "ModuloScheduling LLVMBB: \n"; (*BI)->getBasicBlock()->print(std::cerr)); - - //Catch the odd case where we only have TmpInstructions and no real Value*s - if(!CreateDefMap(*BI)) { - //Clear out our maps for the next basic block that is processed - nodeToAttributesMap.clear(); - partialOrder.clear(); - recurrenceList.clear(); - FinalNodeOrder.clear(); - schedule.clear(); - defMap.clear(); - continue; - } - - MSchedGraph *MSG = new MSchedGraph(*BI, target, indVarInstrs[*BI], DA, machineTollvm[*BI]); - - //Write Graph out to file - DEBUG(WriteGraphToFile(std::cerr, F.getName(), MSG)); - DEBUG(MSG->print(std::cerr)); - - //Calculate Resource II - int ResMII = calculateResMII(*BI); - - //Calculate Recurrence II - int RecMII = calculateRecMII(MSG, ResMII); - - DEBUG(std::cerr << "Number of reccurrences found: " << recurrenceList.size() << "\n"); - - //Our starting initiation interval is the maximum of RecMII and ResMII - if(RecMII < ResMII) - ++RecurrenceConstraint; - else - ++ResourceConstraint; - - II = std::max(RecMII, ResMII); - int mII = II; - - //Print out II, RecMII, and ResMII - DEBUG(std::cerr << "II starts out as " << II << " ( RecMII=" << RecMII << " and ResMII=" << ResMII << ")\n"); - - //Dump node properties if in debug mode - DEBUG(for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), - E = nodeToAttributesMap.end(); I !=E; ++I) { - std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: " - << I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth - << " Height: " << I->second.height << "\n"; - }); - - //Calculate Node Properties - calculateNodeAttributes(MSG, ResMII); - - //Dump node properties if in debug mode - DEBUG(for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), - E = nodeToAttributesMap.end(); I !=E; ++I) { - std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: " - << I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth - << " Height: " << I->second.height << "\n"; - }); - - //Put nodes in order to schedule them - computePartialOrder(); - - //Dump out partial order - DEBUG(for(std::vector<std::set<MSchedGraphNode*> >::iterator I = partialOrder.begin(), - E = partialOrder.end(); I !=E; ++I) { - std::cerr << "Start set in PO\n"; - for(std::set<MSchedGraphNode*>::iterator J = I->begin(), JE = I->end(); J != JE; ++J) - std::cerr << "PO:" << **J << "\n"; - }); - - //Place nodes in final order - orderNodes(); - - //Dump out order of nodes - DEBUG(for(std::vector<MSchedGraphNode*>::iterator I = FinalNodeOrder.begin(), E = FinalNodeOrder.end(); I != E; ++I) { - std::cerr << "FO:" << **I << "\n"; - }); - - //Finally schedule nodes - bool haveSched = computeSchedule(*BI, MSG); - - //Print out final schedule - DEBUG(schedule.print(std::cerr)); - - //Final scheduling step is to reconstruct the loop only if we actual have - //stage > 0 - if(haveSched) { - reconstructLoop(*BI); - ++MSLoops; - Changed = true; - FinalIISum += II; - IISum += mII; - - if(schedule.getMaxStage() == 0) - ++SameStage; - } - else { - ++NoSched; - } - - //Clear out our maps for the next basic block that is processed - nodeToAttributesMap.clear(); - partialOrder.clear(); - recurrenceList.clear(); - FinalNodeOrder.clear(); - schedule.clear(); - defMap.clear(); - //Clean up. Nuke old MachineBB and llvmBB - //BasicBlock *llvmBB = (BasicBlock*) (*BI)->getBasicBlock(); - //Function *parent = (Function*) llvmBB->getParent(); - //Should't std::find work?? - //parent->getBasicBlockList().erase(std::find(parent->getBasicBlockList().begin(), parent->getBasicBlockList().end(), *llvmBB)); - //parent->getBasicBlockList().erase(llvmBB); - - //delete(llvmBB); - //delete(*BI); - } - - alarm(0); - return Changed; -} - -bool ModuloSchedulingPass::CreateDefMap(MachineBasicBlock *BI) { - defaultInst = 0; - - for(MachineBasicBlock::iterator I = BI->begin(), E = BI->end(); I != E; ++I) { - for(unsigned opNum = 0; opNum < I->getNumOperands(); ++opNum) { - const MachineOperand &mOp = I->getOperand(opNum); - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { - //assert if this is the second def we have seen - //DEBUG(std::cerr << "Putting " << *(mOp.getVRegValue()) << " into map\n"); - //assert(!defMap.count(mOp.getVRegValue()) && "Def already in the map"); - if(defMap.count(mOp.getVRegValue())) - return false; - - defMap[mOp.getVRegValue()] = &*I; - } - - //See if we can use this Value* as our defaultInst - if(!defaultInst && mOp.getType() == MachineOperand::MO_VirtualRegister) { - Value *V = mOp.getVRegValue(); - if(!isa<TmpInstruction>(V) && !isa<Argument>(V) && !isa<Constant>(V) && !isa<PHINode>(V)) - defaultInst = (Instruction*) V; - } - } - } - - if(!defaultInst) - return false; - - return true; - -} -/// This function checks if a Machine Basic Block is valid for modulo -/// scheduling. This means that it has no control flow (if/else or -/// calls) in the block. Currently ModuloScheduling only works on -/// single basic block loops. -bool ModuloSchedulingPass::MachineBBisValid(const MachineBasicBlock *BI) { - - bool isLoop = false; - - //Check first if its a valid loop - for(succ_const_iterator I = succ_begin(BI->getBasicBlock()), - E = succ_end(BI->getBasicBlock()); I != E; ++I) { - if (*I == BI->getBasicBlock()) // has single block loop - isLoop = true; - } - - if(!isLoop) - return false; - - //Check that we have a conditional branch (avoiding MS infinite loops) - if(BranchInst *b = dyn_cast<BranchInst>(((BasicBlock*) BI->getBasicBlock())->getTerminator())) - if(b->isUnconditional()) - return false; - - //Check size of our basic block.. make sure we have more then just the terminator in it - if(BI->getBasicBlock()->size() == 1) - return false; - - //Increase number of single basic block loops for stats - ++SingleBBLoops; - - //Get Target machine instruction info - const TargetInstrInfo *TMI = target.getInstrInfo(); - - //Check each instruction and look for calls, keep map to get index later - std::map<const MachineInstr*, unsigned> indexMap; - - unsigned count = 0; - for(MachineBasicBlock::const_iterator I = BI->begin(), E = BI->end(); I != E; ++I) { - //Get opcode to check instruction type - MachineOpCode OC = I->getOpcode(); - - //Look for calls - if(TMI->isCall(OC)) { - ++LoopsWithCalls; - return false; - } - - //Look for conditional move - if(OC == V9::MOVRZr || OC == V9::MOVRZi || OC == V9::MOVRLEZr || OC == V9::MOVRLEZi - || OC == V9::MOVRLZr || OC == V9::MOVRLZi || OC == V9::MOVRNZr || OC == V9::MOVRNZi - || OC == V9::MOVRGZr || OC == V9::MOVRGZi || OC == V9::MOVRGEZr - || OC == V9::MOVRGEZi || OC == V9::MOVLEr || OC == V9::MOVLEi || OC == V9::MOVLEUr - || OC == V9::MOVLEUi || OC == V9::MOVFLEr || OC == V9::MOVFLEi - || OC == V9::MOVNEr || OC == V9::MOVNEi || OC == V9::MOVNEGr || OC == V9::MOVNEGi - || OC == V9::MOVFNEr || OC == V9::MOVFNEi || OC == V9::MOVGr || OC == V9::MOVGi) { - ++LoopsWithCondMov; - return false; - } - - indexMap[I] = count; - - if(TMI->isNop(OC)) - continue; - - ++count; - } - - //Apply a simple pattern match to make sure this loop can be modulo scheduled - //This means only loops with a branch associated to the iteration count - - //Get the branch - BranchInst *b = dyn_cast<BranchInst>(((BasicBlock*) BI->getBasicBlock())->getTerminator()); - - //Get the condition for the branch (we already checked if it was conditional) - Value *cond = b->getCondition(); - - DEBUG(std::cerr << "Condition: " << *cond << "\n"); - - //List of instructions associated with induction variable - std::set<Instruction*> indVar; - std::vector<Instruction*> stack; - - BasicBlock *BB = (BasicBlock*) BI->getBasicBlock(); - - //Add branch - indVar.insert(b); - - if(Instruction *I = dyn_cast<Instruction>(cond)) - if(I->getParent() == BB) { - if (!assocIndVar(I, indVar, stack, BB)) { - ++InvalidLoops; - return false; - } - } - else { - ++InvalidLoops; - return false; - } - else { - ++InvalidLoops; - return false; - } - //The indVar set must be >= 3 instructions for this loop to match (FIX ME!) - if(indVar.size() < 3 ) - return false; - - //Dump out instructions associate with indvar for debug reasons - DEBUG(for(std::set<Instruction*>::iterator N = indVar.begin(), NE = indVar.end(); N != NE; ++N) { - std::cerr << **N << "\n"; - }); - - //Create map of machine instr to llvm instr - std::map<MachineInstr*, Instruction*> mllvm; - for(BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) { - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(I); - for (unsigned j = 0; j < tempMvec.size(); j++) { - mllvm[tempMvec[j]] = I; - } - } - - //Convert list of LLVM Instructions to list of Machine instructions - std::map<const MachineInstr*, unsigned> mIndVar; - for(std::set<Instruction*>::iterator N = indVar.begin(), NE = indVar.end(); N != NE; ++N) { - - //If we have a load, we can't handle this loop because there is no way to preserve dependences - //between loads and stores - if(isa<LoadInst>(*N)) - return false; - - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(*N); - for (unsigned j = 0; j < tempMvec.size(); j++) { - MachineOpCode OC = (tempMvec[j])->getOpcode(); - if(TMI->isNop(OC)) - continue; - if(!indexMap.count(tempMvec[j])) - continue; - mIndVar[(MachineInstr*) tempMvec[j]] = indexMap[(MachineInstr*) tempMvec[j]]; - DEBUG(std::cerr << *(tempMvec[j]) << " at index " << indexMap[(MachineInstr*) tempMvec[j]] << "\n"); - } - } - - //Must have some guts to the loop body (more then 1 instr, dont count nops in size) - if(mIndVar.size() >= (BI->size()-3)) - return false; - - //Put into a map for future access - indVarInstrs[BI] = mIndVar; - machineTollvm[BI] = mllvm; - return true; -} - -bool ModuloSchedulingPass::assocIndVar(Instruction *I, std::set<Instruction*> &indVar, - std::vector<Instruction*> &stack, BasicBlock *BB) { - - stack.push_back(I); - - //If this is a phi node, check if its the canonical indvar - if(PHINode *PN = dyn_cast<PHINode>(I)) { - if (Instruction *Inc = - dyn_cast<Instruction>(PN->getIncomingValueForBlock(BB))) - if (Inc->getOpcode() == Instruction::Add && Inc->getOperand(0) == PN) - if (ConstantInt *CI = dyn_cast<ConstantInt>(Inc->getOperand(1))) - if (CI->equalsInt(1)) { - //We have found the indvar, so add the stack, and inc instruction to the set - indVar.insert(stack.begin(), stack.end()); - indVar.insert(Inc); - stack.pop_back(); - return true; - } - return false; - } - else { - //Loop over each of the instructions operands, check if they are an instruction and in this BB - for(unsigned i = 0; i < I->getNumOperands(); ++i) { - if(Instruction *N = dyn_cast<Instruction>(I->getOperand(i))) { - if(N->getParent() == BB) - if(!assocIndVar(N, indVar, stack, BB)) - return false; - } - } - } - - stack.pop_back(); - return true; -} - -//ResMII is calculated by determining the usage count for each resource -//and using the maximum. -//FIXME: In future there should be a way to get alternative resources -//for each instruction -int ModuloSchedulingPass::calculateResMII(const MachineBasicBlock *BI) { - - TIME_REGION(X, "calculateResMII"); - - const TargetInstrInfo *mii = target.getInstrInfo(); - const TargetSchedInfo *msi = target.getSchedInfo(); - - int ResMII = 0; - - //Map to keep track of usage count of each resource - std::map<unsigned, unsigned> resourceUsageCount; - - for(MachineBasicBlock::const_iterator I = BI->begin(), E = BI->end(); I != E; ++I) { - - //Get resource usage for this instruction - InstrRUsage rUsage = msi->getInstrRUsage(I->getOpcode()); - std::vector<std::vector<resourceId_t> > resources = rUsage.resourcesByCycle; - - //Loop over resources in each cycle and increments their usage count - for(unsigned i=0; i < resources.size(); ++i) - for(unsigned j=0; j < resources[i].size(); ++j) { - if(!resourceUsageCount.count(resources[i][j])) { - resourceUsageCount[resources[i][j]] = 1; - } - else { - resourceUsageCount[resources[i][j]] = resourceUsageCount[resources[i][j]] + 1; - } - } - } - - //Find maximum usage count - - //Get max number of instructions that can be issued at once. (FIXME) - int issueSlots = msi->maxNumIssueTotal; - - for(std::map<unsigned,unsigned>::iterator RB = resourceUsageCount.begin(), RE = resourceUsageCount.end(); RB != RE; ++RB) { - - //Get the total number of the resources in our cpu - int resourceNum = CPUResource::getCPUResource(RB->first)->maxNumUsers; - - //Get total usage count for this resources - unsigned usageCount = RB->second; - - //Divide the usage count by either the max number we can issue or the number of - //resources (whichever is its upper bound) - double finalUsageCount; - DEBUG(std::cerr << "Resource Num: " << RB->first << " Usage: " << usageCount << " TotalNum: " << resourceNum << "\n"); - - if( resourceNum <= issueSlots) - finalUsageCount = ceil(1.0 * usageCount / resourceNum); - else - finalUsageCount = ceil(1.0 * usageCount / issueSlots); - - - //Only keep track of the max - ResMII = std::max( (int) finalUsageCount, ResMII); - - } - - return ResMII; - -} - -/// calculateRecMII - Calculates the value of the highest recurrence -/// By value we mean the total latency -int ModuloSchedulingPass::calculateRecMII(MSchedGraph *graph, int MII) { - /*std::vector<MSchedGraphNode*> vNodes; - //Loop over all nodes in the graph - for(MSchedGraph::iterator I = graph->begin(), E = graph->end(); I != E; ++I) { - findAllReccurrences(I->second, vNodes, MII); - vNodes.clear(); - }*/ - - TIME_REGION(X, "calculateRecMII"); - - findAllCircuits(graph, MII); - int RecMII = 0; - - for(std::set<std::pair<int, std::vector<MSchedGraphNode*> > >::iterator I = recurrenceList.begin(), E=recurrenceList.end(); I !=E; ++I) { - RecMII = std::max(RecMII, I->first); - } - - return MII; -} - -/// calculateNodeAttributes - The following properties are calculated for -/// each node in the dependence graph: ASAP, ALAP, Depth, Height, and -/// MOB. -void ModuloSchedulingPass::calculateNodeAttributes(MSchedGraph *graph, int MII) { - - TIME_REGION(X, "calculateNodeAttributes"); - - assert(nodeToAttributesMap.empty() && "Node attribute map was not cleared"); - - //Loop over the nodes and add them to the map - for(MSchedGraph::iterator I = graph->begin(), E = graph->end(); I != E; ++I) { - - DEBUG(std::cerr << "Inserting node into attribute map: " << *I->second << "\n"); - - //Assert if its already in the map - assert(nodeToAttributesMap.count(I->second) == 0 && - "Node attributes are already in the map"); - - //Put into the map with default attribute values - nodeToAttributesMap[I->second] = MSNodeAttributes(); - } - - //Create set to deal with reccurrences - std::set<MSchedGraphNode*> visitedNodes; - - //Now Loop over map and calculate the node attributes - for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { - calculateASAP(I->first, MII, (MSchedGraphNode*) 0); - visitedNodes.clear(); - } - - int maxASAP = findMaxASAP(); - //Calculate ALAP which depends on ASAP being totally calculated - for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { - calculateALAP(I->first, MII, maxASAP, (MSchedGraphNode*) 0); - visitedNodes.clear(); - } - - //Calculate MOB which depends on ASAP being totally calculated, also do depth and height - for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { - (I->second).MOB = std::max(0,(I->second).ALAP - (I->second).ASAP); - - DEBUG(std::cerr << "MOB: " << (I->second).MOB << " (" << *(I->first) << ")\n"); - calculateDepth(I->first, (MSchedGraphNode*) 0); - calculateHeight(I->first, (MSchedGraphNode*) 0); - } - - -} - -/// ignoreEdge - Checks to see if this edge of a recurrence should be ignored or not -bool ModuloSchedulingPass::ignoreEdge(MSchedGraphNode *srcNode, MSchedGraphNode *destNode) { - if(destNode == 0 || srcNode ==0) - return false; - - bool findEdge = edgesToIgnore.count(std::make_pair(srcNode, destNode->getInEdgeNum(srcNode))); - - DEBUG(std::cerr << "Ignoring edge? from: " << *srcNode << " to " << *destNode << "\n"); - - return findEdge; -} - - -/// calculateASAP - Calculates the -int ModuloSchedulingPass::calculateASAP(MSchedGraphNode *node, int MII, MSchedGraphNode *destNode) { - - DEBUG(std::cerr << "Calculating ASAP for " << *node << "\n"); - - //Get current node attributes - MSNodeAttributes &attributes = nodeToAttributesMap.find(node)->second; - - if(attributes.ASAP != -1) - return attributes.ASAP; - - int maxPredValue = 0; - - //Iterate over all of the predecessors and find max - for(MSchedGraphNode::pred_iterator P = node->pred_begin(), E = node->pred_end(); P != E; ++P) { - - //Only process if we are not ignoring the edge - if(!ignoreEdge(*P, node)) { - int predASAP = -1; - predASAP = calculateASAP(*P, MII, node); - - assert(predASAP != -1 && "ASAP has not been calculated"); - int iteDiff = node->getInEdge(*P).getIteDiff(); - - int currentPredValue = predASAP + (*P)->getLatency() - (iteDiff * MII); - DEBUG(std::cerr << "pred ASAP: " << predASAP << ", iteDiff: " << iteDiff << ", PredLatency: " << (*P)->getLatency() << ", Current ASAP pred: " << currentPredValue << "\n"); - maxPredValue = std::max(maxPredValue, currentPredValue); - } - } - - attributes.ASAP = maxPredValue; - - DEBUG(std::cerr << "ASAP: " << attributes.ASAP << " (" << *node << ")\n"); - - return maxPredValue; -} - - -int ModuloSchedulingPass::calculateALAP(MSchedGraphNode *node, int MII, - int maxASAP, MSchedGraphNode *srcNode) { - - DEBUG(std::cerr << "Calculating ALAP for " << *node << "\n"); - - MSNodeAttributes &attributes = nodeToAttributesMap.find(node)->second; - - if(attributes.ALAP != -1) - return attributes.ALAP; - - if(node->hasSuccessors()) { - - //Trying to deal with the issue where the node has successors, but - //we are ignoring all of the edges to them. So this is my hack for - //now.. there is probably a more elegant way of doing this (FIXME) - bool processedOneEdge = false; - - //FIXME, set to something high to start - int minSuccValue = 9999999; - - //Iterate over all of the predecessors and fine max - for(MSchedGraphNode::succ_iterator P = node->succ_begin(), - E = node->succ_end(); P != E; ++P) { - - //Only process if we are not ignoring the edge - if(!ignoreEdge(node, *P)) { - processedOneEdge = true; - int succALAP = -1; - succALAP = calculateALAP(*P, MII, maxASAP, node); - - assert(succALAP != -1 && "Successors ALAP should have been caclulated"); - - int iteDiff = P.getEdge().getIteDiff(); - - int currentSuccValue = succALAP - node->getLatency() + iteDiff * MII; - - DEBUG(std::cerr << "succ ALAP: " << succALAP << ", iteDiff: " << iteDiff << ", SuccLatency: " << (*P)->getLatency() << ", Current ALAP succ: " << currentSuccValue << "\n"); - - minSuccValue = std::min(minSuccValue, currentSuccValue); - } - } - - if(processedOneEdge) - attributes.ALAP = minSuccValue; - - else - attributes.ALAP = maxASAP; - } - else - attributes.ALAP = maxASAP; - - DEBUG(std::cerr << "ALAP: " << attributes.ALAP << " (" << *node << ")\n"); - - if(attributes.ALAP < 0) - attributes.ALAP = 0; - - return attributes.ALAP; -} - -int ModuloSchedulingPass::findMaxASAP() { - int maxASAP = 0; - - for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), - E = nodeToAttributesMap.end(); I != E; ++I) - maxASAP = std::max(maxASAP, I->second.ASAP); - return maxASAP; -} - - -int ModuloSchedulingPass::calculateHeight(MSchedGraphNode *node,MSchedGraphNode *srcNode) { - - MSNodeAttributes &attributes = nodeToAttributesMap.find(node)->second; - - if(attributes.height != -1) - return attributes.height; - - int maxHeight = 0; - - //Iterate over all of the predecessors and find max - for(MSchedGraphNode::succ_iterator P = node->succ_begin(), - E = node->succ_end(); P != E; ++P) { - - - if(!ignoreEdge(node, *P)) { - int succHeight = calculateHeight(*P, node); - - assert(succHeight != -1 && "Successors Height should have been caclulated"); - - int currentHeight = succHeight + node->getLatency(); - maxHeight = std::max(maxHeight, currentHeight); - } - } - attributes.height = maxHeight; - DEBUG(std::cerr << "Height: " << attributes.height << " (" << *node << ")\n"); - return maxHeight; -} - - -int ModuloSchedulingPass::calculateDepth(MSchedGraphNode *node, - MSchedGraphNode *destNode) { - - MSNodeAttributes &attributes = nodeToAttributesMap.find(node)->second; - - if(attributes.depth != -1) - return attributes.depth; - - int maxDepth = 0; - - //Iterate over all of the predecessors and fine max - for(MSchedGraphNode::pred_iterator P = node->pred_begin(), E = node->pred_end(); P != E; ++P) { - - if(!ignoreEdge(*P, node)) { - int predDepth = -1; - predDepth = calculateDepth(*P, node); - - assert(predDepth != -1 && "Predecessors ASAP should have been caclulated"); - - int currentDepth = predDepth + (*P)->getLatency(); - maxDepth = std::max(maxDepth, currentDepth); - } - } - attributes.depth = maxDepth; - - DEBUG(std::cerr << "Depth: " << attributes.depth << " (" << *node << "*)\n"); - return maxDepth; -} - - - -void ModuloSchedulingPass::addReccurrence(std::vector<MSchedGraphNode*> &recurrence, int II, MSchedGraphNode *srcBENode, MSchedGraphNode *destBENode) { - //Check to make sure that this recurrence is unique - bool same = false; - - - //Loop over all recurrences already in our list - for(std::set<std::pair<int, std::vector<MSchedGraphNode*> > >::iterator R = recurrenceList.begin(), RE = recurrenceList.end(); R != RE; ++R) { - - bool all_same = true; - //First compare size - if(R->second.size() == recurrence.size()) { - - for(std::vector<MSchedGraphNode*>::const_iterator node = R->second.begin(), end = R->second.end(); node != end; ++node) { - if(std::find(recurrence.begin(), recurrence.end(), *node) == recurrence.end()) { - all_same = all_same && false; - break; - } - else - all_same = all_same && true; - } - if(all_same) { - same = true; - break; - } - } - } - - if(!same) { - srcBENode = recurrence.back(); - destBENode = recurrence.front(); - - //FIXME - if(destBENode->getInEdge(srcBENode).getIteDiff() == 0) { - //DEBUG(std::cerr << "NOT A BACKEDGE\n"); - //find actual backedge HACK HACK - for(unsigned i=0; i< recurrence.size()-1; ++i) { - if(recurrence[i+1]->getInEdge(recurrence[i]).getIteDiff() == 1) { - srcBENode = recurrence[i]; - destBENode = recurrence[i+1]; - break; - } - - } - - } - DEBUG(std::cerr << "Back Edge to Remove: " << *srcBENode << " to " << *destBENode << "\n"); - edgesToIgnore.insert(std::make_pair(srcBENode, destBENode->getInEdgeNum(srcBENode))); - recurrenceList.insert(std::make_pair(II, recurrence)); - } - -} - -int CircCount; - -void ModuloSchedulingPass::unblock(MSchedGraphNode *u, std::set<MSchedGraphNode*> &blocked, - std::map<MSchedGraphNode*, std::set<MSchedGraphNode*> > &B) { - - //Unblock u - DEBUG(std::cerr << "Unblocking: " << *u << "\n"); - blocked.erase(u); - - //std::set<MSchedGraphNode*> toErase; - while (!B[u].empty()) { - MSchedGraphNode *W = *B[u].begin(); - B[u].erase(W); - //toErase.insert(*W); - DEBUG(std::cerr << "Removed: " << *W << "from B-List\n"); - if(blocked.count(W)) - unblock(W, blocked, B); - } - -} - -bool ModuloSchedulingPass::circuit(MSchedGraphNode *v, std::vector<MSchedGraphNode*> &stack, - std::set<MSchedGraphNode*> &blocked, std::vector<MSchedGraphNode*> &SCC, - MSchedGraphNode *s, std::map<MSchedGraphNode*, std::set<MSchedGraphNode*> > &B, - int II, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes) { - bool f = false; - - DEBUG(std::cerr << "Finding Circuits Starting with: ( " << v << ")"<< *v << "\n"); - - //Push node onto the stack - stack.push_back(v); - - //block this node - blocked.insert(v); - - //Loop over all successors of node v that are in the scc, create Adjaceny list - std::set<MSchedGraphNode*> AkV; - for(MSchedGraphNode::succ_iterator I = v->succ_begin(), E = v->succ_end(); I != E; ++I) { - if((std::find(SCC.begin(), SCC.end(), *I) != SCC.end())) { - AkV.insert(*I); - } - } - - for(std::set<MSchedGraphNode*>::iterator I = AkV.begin(), E = AkV.end(); I != E; ++I) { - if(*I == s) { - //We have a circuit, so add it to our list - addRecc(stack, newNodes); - f = true; - } - else if(!blocked.count(*I)) { - if(circuit(*I, stack, blocked, SCC, s, B, II, newNodes)) - f = true; - } - else - DEBUG(std::cerr << "Blocked: " << **I << "\n"); - } - - - if(f) { - unblock(v, blocked, B); - } - else { - for(std::set<MSchedGraphNode*>::iterator I = AkV.begin(), E = AkV.end(); I != E; ++I) - B[*I].insert(v); - - } - - //Pop v - stack.pop_back(); - - return f; - -} - -void ModuloSchedulingPass::addRecc(std::vector<MSchedGraphNode*> &stack, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes) { - std::vector<MSchedGraphNode*> recc; - //Dump recurrence for now - DEBUG(std::cerr << "Starting Recc\n"); - - int totalDelay = 0; - int totalDistance = 0; - MSchedGraphNode *lastN = 0; - MSchedGraphNode *start = 0; - MSchedGraphNode *end = 0; - - //Loop over recurrence, get delay and distance - for(std::vector<MSchedGraphNode*>::iterator N = stack.begin(), NE = stack.end(); N != NE; ++N) { - DEBUG(std::cerr << **N << "\n"); - totalDelay += (*N)->getLatency(); - if(lastN) { - int iteDiff = (*N)->getInEdge(lastN).getIteDiff(); - totalDistance += iteDiff; - - if(iteDiff > 0) { - start = lastN; - end = *N; - } - } - //Get the original node - lastN = *N; - recc.push_back(newNodes[*N]); - - - } - - //Get the loop edge - totalDistance += lastN->getIteDiff(*stack.begin()); - - DEBUG(std::cerr << "End Recc\n"); - CircCount++; - - if(start && end) { - //Insert reccurrence into the list - DEBUG(std::cerr << "Ignore Edge from!!: " << *start << " to " << *end << "\n"); - edgesToIgnore.insert(std::make_pair(newNodes[start], (newNodes[end])->getInEdgeNum(newNodes[start]))); - } - else { - //Insert reccurrence into the list - DEBUG(std::cerr << "Ignore Edge from: " << *lastN << " to " << **stack.begin() << "\n"); - edgesToIgnore.insert(std::make_pair(newNodes[lastN], newNodes[(*stack.begin())]->getInEdgeNum(newNodes[lastN]))); - - } - //Adjust II until we get close to the inequality delay - II*distance <= 0 - int RecMII = II; //Starting value - int value = totalDelay-(RecMII * totalDistance); - int lastII = II; - while(value < 0) { - - lastII = RecMII; - RecMII--; - value = totalDelay-(RecMII * totalDistance); - } - - recurrenceList.insert(std::make_pair(lastII, recc)); - -} - -void ModuloSchedulingPass::addSCC(std::vector<MSchedGraphNode*> &SCC, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes) { - - int totalDelay = 0; - int totalDistance = 0; - std::vector<MSchedGraphNode*> recc; - MSchedGraphNode *start = 0; - MSchedGraphNode *end = 0; - - //Loop over recurrence, get delay and distance - for(std::vector<MSchedGraphNode*>::iterator N = SCC.begin(), NE = SCC.end(); N != NE; ++N) { - DEBUG(std::cerr << **N << "\n"); - totalDelay += (*N)->getLatency(); - - for(unsigned i = 0; i < (*N)->succ_size(); ++i) { - MSchedGraphEdge *edge = (*N)->getSuccessor(i); - if(find(SCC.begin(), SCC.end(), edge->getDest()) != SCC.end()) { - totalDistance += edge->getIteDiff(); - if(edge->getIteDiff() > 0) - if(!start && !end) { - start = *N; - end = edge->getDest(); - } - - } - } - - - //Get the original node - recc.push_back(newNodes[*N]); - - - } - - DEBUG(std::cerr << "End Recc\n"); - CircCount++; - - assert( (start && end) && "Must have start and end node to ignore edge for SCC"); - - if(start && end) { - //Insert reccurrence into the list - DEBUG(std::cerr << "Ignore Edge from!!: " << *start << " to " << *end << "\n"); - edgesToIgnore.insert(std::make_pair(newNodes[start], (newNodes[end])->getInEdgeNum(newNodes[start]))); - } - - int lastII = totalDelay / totalDistance; - - - recurrenceList.insert(std::make_pair(lastII, recc)); - -} - -void ModuloSchedulingPass::findAllCircuits(MSchedGraph *g, int II) { - - CircCount = 0; - - //Keep old to new node mapping information - std::map<MSchedGraphNode*, MSchedGraphNode*> newNodes; - - //copy the graph - MSchedGraph *MSG = new MSchedGraph(*g, newNodes); - - DEBUG(std::cerr << "Finding All Circuits\n"); - - //Set of blocked nodes - std::set<MSchedGraphNode*> blocked; - - //Stack holding current circuit - std::vector<MSchedGraphNode*> stack; - - //Map for B Lists - std::map<MSchedGraphNode*, std::set<MSchedGraphNode*> > B; - - //current node - MSchedGraphNode *s; - - - //Iterate over the graph until its down to one node or empty - while(MSG->size() > 1) { - - //Write Graph out to file - //WriteGraphToFile(std::cerr, "Graph" + utostr(MSG->size()), MSG); - - DEBUG(std::cerr << "Graph Size: " << MSG->size() << "\n"); - DEBUG(std::cerr << "Finding strong component Vk with least vertex\n"); - - //Iterate over all the SCCs in the graph - std::set<MSchedGraphNode*> Visited; - std::vector<MSchedGraphNode*> Vk; - MSchedGraphNode* s = 0; - int numEdges = 0; - - //Find scc with the least vertex - for (MSchedGraph::iterator GI = MSG->begin(), E = MSG->end(); GI != E; ++GI) - if (Visited.insert(GI->second).second) { - for (scc_iterator<MSchedGraphNode*> SCCI = scc_begin(GI->second), - E = scc_end(GI->second); SCCI != E; ++SCCI) { - std::vector<MSchedGraphNode*> &nextSCC = *SCCI; - - if (Visited.insert(nextSCC[0]).second) { - Visited.insert(nextSCC.begin()+1, nextSCC.end()); - - if(nextSCC.size() > 1) { - std::cerr << "SCC size: " << nextSCC.size() << "\n"; - - for(unsigned i = 0; i < nextSCC.size(); ++i) { - //Loop over successor and see if in scc, then count edge - MSchedGraphNode *node = nextSCC[i]; - for(MSchedGraphNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; ++S) { - if(find(nextSCC.begin(), nextSCC.end(), *S) != nextSCC.end()) - numEdges++; - } - } - std::cerr << "Num Edges: " << numEdges << "\n"; - } - - //Ignore self loops - if(nextSCC.size() > 1) { - - //Get least vertex in Vk - if(!s) { - s = nextSCC[0]; - Vk = nextSCC; - } - - for(unsigned i = 0; i < nextSCC.size(); ++i) { - if(nextSCC[i] < s) { - s = nextSCC[i]; - Vk = nextSCC; - } - } - } - } - } - } - - - - //Process SCC - DEBUG(for(std::vector<MSchedGraphNode*>::iterator N = Vk.begin(), NE = Vk.end(); - N != NE; ++N) { std::cerr << *((*N)->getInst()); }); - - //Iterate over all nodes in this scc - for(std::vector<MSchedGraphNode*>::iterator N = Vk.begin(), NE = Vk.end(); - N != NE; ++N) { - blocked.erase(*N); - B[*N].clear(); - } - if(Vk.size() > 1) { - if(numEdges < 98) - circuit(s, stack, blocked, Vk, s, B, II, newNodes); - else - addSCC(Vk, newNodes); - - //Delete nodes from the graph - //Find all nodes up to s and delete them - std::vector<MSchedGraphNode*> nodesToRemove; - nodesToRemove.push_back(s); - for(MSchedGraph::iterator N = MSG->begin(), NE = MSG->end(); N != NE; ++N) { - if(N->second < s ) - nodesToRemove.push_back(N->second); - } - for(std::vector<MSchedGraphNode*>::iterator N = nodesToRemove.begin(), NE = nodesToRemove.end(); N != NE; ++N) { - DEBUG(std::cerr << "Deleting Node: " << **N << "\n"); - MSG->deleteNode(*N); - } - } - else - break; - } - DEBUG(std::cerr << "Num Circuits found: " << CircCount << "\n"); -} - - -void ModuloSchedulingPass::findAllReccurrences(MSchedGraphNode *node, - std::vector<MSchedGraphNode*> &visitedNodes, - int II) { - - - if(std::find(visitedNodes.begin(), visitedNodes.end(), node) != visitedNodes.end()) { - std::vector<MSchedGraphNode*> recurrence; - bool first = true; - int delay = 0; - int distance = 0; - int RecMII = II; //Starting value - MSchedGraphNode *last = node; - MSchedGraphNode *srcBackEdge = 0; - MSchedGraphNode *destBackEdge = 0; - - - - for(std::vector<MSchedGraphNode*>::iterator I = visitedNodes.begin(), E = visitedNodes.end(); - I !=E; ++I) { - - if(*I == node) - first = false; - if(first) - continue; - - delay = delay + (*I)->getLatency(); - - if(*I != node) { - int diff = (*I)->getInEdge(last).getIteDiff(); - distance += diff; - if(diff > 0) { - srcBackEdge = last; - destBackEdge = *I; - } - } - - recurrence.push_back(*I); - last = *I; - } - - - - //Get final distance calc - distance += node->getInEdge(last).getIteDiff(); - DEBUG(std::cerr << "Reccurrence Distance: " << distance << "\n"); - - //Adjust II until we get close to the inequality delay - II*distance <= 0 - - int value = delay-(RecMII * distance); - int lastII = II; - while(value <= 0) { - - lastII = RecMII; - RecMII--; - value = delay-(RecMII * distance); - } - - - DEBUG(std::cerr << "Final II for this recurrence: " << lastII << "\n"); - addReccurrence(recurrence, lastII, srcBackEdge, destBackEdge); - assert(distance != 0 && "Recurrence distance should not be zero"); - return; - } - - unsigned count = 0; - for(MSchedGraphNode::succ_iterator I = node->succ_begin(), E = node->succ_end(); I != E; ++I) { - visitedNodes.push_back(node); - //if(!edgesToIgnore.count(std::make_pair(node, count))) - findAllReccurrences(*I, visitedNodes, II); - visitedNodes.pop_back(); - count++; - } -} - -void ModuloSchedulingPass::searchPath(MSchedGraphNode *node, - std::vector<MSchedGraphNode*> &path, - std::set<MSchedGraphNode*> &nodesToAdd, - std::set<MSchedGraphNode*> &new_reccurrence) { - //Push node onto the path - path.push_back(node); - - //Loop over all successors and see if there is a path from this node to - //a recurrence in the partial order, if so.. add all nodes to be added to recc - for(MSchedGraphNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; - ++S) { - - //Check if we should ignore this edge first - if(ignoreEdge(node,*S)) - continue; - - //check if successor is in this recurrence, we will get to it eventually - if(new_reccurrence.count(*S)) - continue; - - //If this node exists in a recurrence already in the partial - //order, then add all nodes in the path to the set of nodes to add - //Check if its already in our partial order, if not add it to the - //final vector - bool found = false; - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - - if(PO->count(*S)) { - found = true; - break; - } - } - - if(!found) { - nodesToAdd.insert(*S); - searchPath(*S, path, nodesToAdd, new_reccurrence); - } - } - - //Pop Node off the path - path.pop_back(); -} - -void ModuloSchedulingPass::pathToRecc(MSchedGraphNode *node, - std::vector<MSchedGraphNode*> &path, - std::set<MSchedGraphNode*> &poSet, - std::set<MSchedGraphNode*> &lastNodes) { - //Push node onto the path - path.push_back(node); - - DEBUG(std::cerr << "Current node: " << *node << "\n"); - - //Loop over all successors and see if there is a path from this node to - //a recurrence in the partial order, if so.. add all nodes to be added to recc - for(MSchedGraphNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; - ++S) { - DEBUG(std::cerr << "Succ:" << **S << "\n"); - //Check if we should ignore this edge first - if(ignoreEdge(node,*S)) - continue; - - if(poSet.count(*S)) { - DEBUG(std::cerr << "Found path to recc from no pred\n"); - //Loop over path, if it exists in lastNodes, then add to poset, and remove from lastNodes - for(std::vector<MSchedGraphNode*>::iterator I = path.begin(), IE = path.end(); I != IE; ++I) { - if(lastNodes.count(*I)) { - DEBUG(std::cerr << "Inserting node into recc: " << **I << "\n"); - poSet.insert(*I); - lastNodes.erase(*I); - } - } - } - else - pathToRecc(*S, path, poSet, lastNodes); - } - - //Pop Node off the path - path.pop_back(); -} - -void ModuloSchedulingPass::computePartialOrder() { - - TIME_REGION(X, "calculatePartialOrder"); - - DEBUG(std::cerr << "Computing Partial Order\n"); - - //Only push BA branches onto the final node order, we put other - //branches after it FIXME: Should we really be pushing branches on - //it a specific order instead of relying on BA being there? - - std::vector<MSchedGraphNode*> branches; - - //Steps to add a recurrence to the partial order 1) Find reccurrence - //with the highest RecMII. Add it to the partial order. 2) For each - //recurrence with decreasing RecMII, add it to the partial order - //along with any nodes that connect this recurrence to recurrences - //already in the partial order - for(std::set<std::pair<int, std::vector<MSchedGraphNode*> > >::reverse_iterator - I = recurrenceList.rbegin(), E=recurrenceList.rend(); I !=E; ++I) { - - std::set<MSchedGraphNode*> new_recurrence; - - //Loop through recurrence and remove any nodes already in the partial order - for(std::vector<MSchedGraphNode*>::const_iterator N = I->second.begin(), - NE = I->second.end(); N != NE; ++N) { - - bool found = false; - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - if(PO->count(*N)) - found = true; - } - - //Check if its a branch, and remove to handle special - if(!found) { - if((*N)->isBranch() && !(*N)->hasPredecessors()) { - branches.push_back(*N); - } - else - new_recurrence.insert(*N); - } - - } - - - if(new_recurrence.size() > 0) { - - std::vector<MSchedGraphNode*> path; - std::set<MSchedGraphNode*> nodesToAdd; - - //Dump recc we are dealing with (minus nodes already in PO) - DEBUG(std::cerr << "Recc: "); - DEBUG(for(std::set<MSchedGraphNode*>::iterator R = new_recurrence.begin(), RE = new_recurrence.end(); R != RE; ++R) { std::cerr << **R ; }); - - //Add nodes that connect this recurrence to recurrences in the partial path - for(std::set<MSchedGraphNode*>::iterator N = new_recurrence.begin(), - NE = new_recurrence.end(); N != NE; ++N) - searchPath(*N, path, nodesToAdd, new_recurrence); - - //Add nodes to this recurrence if they are not already in the partial order - for(std::set<MSchedGraphNode*>::iterator N = nodesToAdd.begin(), NE = nodesToAdd.end(); - N != NE; ++N) { - bool found = false; - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - if(PO->count(*N)) - found = true; - } - if(!found) { - assert("FOUND CONNECTOR"); - new_recurrence.insert(*N); - } - } - - partialOrder.push_back(new_recurrence); - - - //Dump out partial order - DEBUG(for(std::vector<std::set<MSchedGraphNode*> >::iterator I = partialOrder.begin(), - E = partialOrder.end(); I !=E; ++I) { - std::cerr << "Start set in PO\n"; - for(std::set<MSchedGraphNode*>::iterator J = I->begin(), JE = I->end(); J != JE; ++J) - std::cerr << "PO:" << **J << "\n"; - }); - - } - } - - //Add any nodes that are not already in the partial order - //Add them in a set, one set per connected component - std::set<MSchedGraphNode*> lastNodes; - std::set<MSchedGraphNode*> noPredNodes; - for(std::map<MSchedGraphNode*, MSNodeAttributes>::iterator I = nodeToAttributesMap.begin(), - E = nodeToAttributesMap.end(); I != E; ++I) { - - bool found = false; - - //Check if its already in our partial order, if not add it to the final vector - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - if(PO->count(I->first)) - found = true; - } - if(!found) - lastNodes.insert(I->first); - } - - //For each node w/out preds, see if there is a path to one of the - //recurrences, and if so add them to that current recc - /*for(std::set<MSchedGraphNode*>::iterator N = noPredNodes.begin(), NE = noPredNodes.end(); - N != NE; ++N) { - DEBUG(std::cerr << "No Pred Path from: " << **N << "\n"); - for(std::vector<std::set<MSchedGraphNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - std::vector<MSchedGraphNode*> path; - pathToRecc(*N, path, *PO, lastNodes); - } - }*/ - - - //Break up remaining nodes that are not in the partial order - ///into their connected compoenents - while(lastNodes.size() > 0) { - std::set<MSchedGraphNode*> ccSet; - connectedComponentSet(*(lastNodes.begin()),ccSet, lastNodes); - if(ccSet.size() > 0) - partialOrder.push_back(ccSet); - } - - - //Clean up branches by putting them in final order - assert(branches.size() == 0 && "We should not have any branches in our graph"); -} - - -void ModuloSchedulingPass::connectedComponentSet(MSchedGraphNode *node, std::set<MSchedGraphNode*> &ccSet, std::set<MSchedGraphNode*> &lastNodes) { - -//Add to final set - if( !ccSet.count(node) && lastNodes.count(node)) { - lastNodes.erase(node); - ccSet.insert(node); - } - else - return; - - //Loop over successors and recurse if we have not seen this node before - for(MSchedGraphNode::succ_iterator node_succ = node->succ_begin(), end=node->succ_end(); node_succ != end; ++node_succ) { - connectedComponentSet(*node_succ, ccSet, lastNodes); - } - -} - -void ModuloSchedulingPass::predIntersect(std::set<MSchedGraphNode*> &CurrentSet, std::set<MSchedGraphNode*> &IntersectResult) { - - for(unsigned j=0; j < FinalNodeOrder.size(); ++j) { - for(MSchedGraphNode::pred_iterator P = FinalNodeOrder[j]->pred_begin(), - E = FinalNodeOrder[j]->pred_end(); P != E; ++P) { - - //Check if we are supposed to ignore this edge or not - if(ignoreEdge(*P,FinalNodeOrder[j])) - continue; - - if(CurrentSet.count(*P)) - if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), *P) == FinalNodeOrder.end()) - IntersectResult.insert(*P); - } - } -} - - - - - -void ModuloSchedulingPass::succIntersect(std::set<MSchedGraphNode*> &CurrentSet, std::set<MSchedGraphNode*> &IntersectResult) { - - for(unsigned j=0; j < FinalNodeOrder.size(); ++j) { - for(MSchedGraphNode::succ_iterator P = FinalNodeOrder[j]->succ_begin(), - E = FinalNodeOrder[j]->succ_end(); P != E; ++P) { - - //Check if we are supposed to ignore this edge or not - if(ignoreEdge(FinalNodeOrder[j],*P)) - continue; - - if(CurrentSet.count(*P)) - if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), *P) == FinalNodeOrder.end()) - IntersectResult.insert(*P); - } - } -} - -void dumpIntersection(std::set<MSchedGraphNode*> &IntersectCurrent) { - std::cerr << "Intersection ("; - for(std::set<MSchedGraphNode*>::iterator I = IntersectCurrent.begin(), E = IntersectCurrent.end(); I != E; ++I) - std::cerr << **I << ", "; - std::cerr << ")\n"; -} - - - -void ModuloSchedulingPass::orderNodes() { - - TIME_REGION(X, "orderNodes"); - - int BOTTOM_UP = 0; - int TOP_DOWN = 1; - - //Set default order - int order = BOTTOM_UP; - - - //Loop over all the sets and place them in the final node order - for(std::vector<std::set<MSchedGraphNode*> >::iterator CurrentSet = partialOrder.begin(), E= partialOrder.end(); CurrentSet != E; ++CurrentSet) { - - DEBUG(std::cerr << "Processing set in S\n"); - DEBUG(dumpIntersection(*CurrentSet)); - - //Result of intersection - std::set<MSchedGraphNode*> IntersectCurrent; - - predIntersect(*CurrentSet, IntersectCurrent); - - //If the intersection of predecessor and current set is not empty - //sort nodes bottom up - if(IntersectCurrent.size() != 0) { - DEBUG(std::cerr << "Final Node Order Predecessors and Current Set interesection is NOT empty\n"); - order = BOTTOM_UP; - } - //If empty, use successors - else { - DEBUG(std::cerr << "Final Node Order Predecessors and Current Set interesection is empty\n"); - - succIntersect(*CurrentSet, IntersectCurrent); - - //sort top-down - if(IntersectCurrent.size() != 0) { - DEBUG(std::cerr << "Final Node Order Successors and Current Set interesection is NOT empty\n"); - order = TOP_DOWN; - } - else { - DEBUG(std::cerr << "Final Node Order Successors and Current Set interesection is empty\n"); - //Find node with max ASAP in current Set - MSchedGraphNode *node; - int maxASAP = 0; - DEBUG(std::cerr << "Using current set of size " << CurrentSet->size() << "to find max ASAP\n"); - for(std::set<MSchedGraphNode*>::iterator J = CurrentSet->begin(), JE = CurrentSet->end(); J != JE; ++J) { - //Get node attributes - MSNodeAttributes nodeAttr= nodeToAttributesMap.find(*J)->second; - //assert(nodeAttr != nodeToAttributesMap.end() && "Node not in attributes map!"); - - if(maxASAP <= nodeAttr.ASAP) { - maxASAP = nodeAttr.ASAP; - node = *J; - } - } - assert(node != 0 && "In node ordering node should not be null"); - IntersectCurrent.insert(node); - order = BOTTOM_UP; - } - } - - //Repeat until all nodes are put into the final order from current set - while(IntersectCurrent.size() > 0) { - - if(order == TOP_DOWN) { - DEBUG(std::cerr << "Order is TOP DOWN\n"); - - while(IntersectCurrent.size() > 0) { - DEBUG(std::cerr << "Intersection is not empty, so find heighest height\n"); - - int MOB = 0; - int height = 0; - MSchedGraphNode *highestHeightNode = *(IntersectCurrent.begin()); - - //Find node in intersection with highest heigh and lowest MOB - for(std::set<MSchedGraphNode*>::iterator I = IntersectCurrent.begin(), - E = IntersectCurrent.end(); I != E; ++I) { - - //Get current nodes properties - MSNodeAttributes nodeAttr= nodeToAttributesMap.find(*I)->second; - - if(height < nodeAttr.height) { - highestHeightNode = *I; - height = nodeAttr.height; - MOB = nodeAttr.MOB; - } - else if(height == nodeAttr.height) { - if(MOB > nodeAttr.height) { - highestHeightNode = *I; - height = nodeAttr.height; - MOB = nodeAttr.MOB; - } - } - } - - //Append our node with greatest height to the NodeOrder - if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), highestHeightNode) == FinalNodeOrder.end()) { - DEBUG(std::cerr << "Adding node to Final Order: " << *highestHeightNode << "\n"); - FinalNodeOrder.push_back(highestHeightNode); - } - - //Remove V from IntersectOrder - IntersectCurrent.erase(std::find(IntersectCurrent.begin(), - IntersectCurrent.end(), highestHeightNode)); - - - //Intersect V's successors with CurrentSet - for(MSchedGraphNode::succ_iterator P = highestHeightNode->succ_begin(), - E = highestHeightNode->succ_end(); P != E; ++P) { - //if(lower_bound(CurrentSet->begin(), - // CurrentSet->end(), *P) != CurrentSet->end()) { - if(std::find(CurrentSet->begin(), CurrentSet->end(), *P) != CurrentSet->end()) { - if(ignoreEdge(highestHeightNode, *P)) - continue; - //If not already in Intersect, add - if(!IntersectCurrent.count(*P)) - IntersectCurrent.insert(*P); - } - } - } //End while loop over Intersect Size - - //Change direction - order = BOTTOM_UP; - - //Reset Intersect to reflect changes in OrderNodes - IntersectCurrent.clear(); - predIntersect(*CurrentSet, IntersectCurrent); - - } //End If TOP_DOWN - - //Begin if BOTTOM_UP - else { - DEBUG(std::cerr << "Order is BOTTOM UP\n"); - while(IntersectCurrent.size() > 0) { - DEBUG(std::cerr << "Intersection of size " << IntersectCurrent.size() << ", finding highest depth\n"); - - //dump intersection - DEBUG(dumpIntersection(IntersectCurrent)); - //Get node with highest depth, if a tie, use one with lowest - //MOB - int MOB = 0; - int depth = 0; - MSchedGraphNode *highestDepthNode = *(IntersectCurrent.begin()); - - for(std::set<MSchedGraphNode*>::iterator I = IntersectCurrent.begin(), - E = IntersectCurrent.end(); I != E; ++I) { - //Find node attribute in graph - MSNodeAttributes nodeAttr= nodeToAttributesMap.find(*I)->second; - - if(depth < nodeAttr.depth) { - highestDepthNode = *I; - depth = nodeAttr.depth; - MOB = nodeAttr.MOB; - } - else if(depth == nodeAttr.depth) { - if(MOB > nodeAttr.MOB) { - highestDepthNode = *I; - depth = nodeAttr.depth; - MOB = nodeAttr.MOB; - } - } - } - - - - //Append highest depth node to the NodeOrder - if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), highestDepthNode) == FinalNodeOrder.end()) { - DEBUG(std::cerr << "Adding node to Final Order: " << *highestDepthNode << "\n"); - FinalNodeOrder.push_back(highestDepthNode); - } - //Remove heightestDepthNode from IntersectOrder - IntersectCurrent.erase(highestDepthNode); - - - //Intersect heightDepthNode's pred with CurrentSet - for(MSchedGraphNode::pred_iterator P = highestDepthNode->pred_begin(), - E = highestDepthNode->pred_end(); P != E; ++P) { - if(CurrentSet->count(*P)) { - if(ignoreEdge(*P, highestDepthNode)) - continue; - - //If not already in Intersect, add - if(!IntersectCurrent.count(*P)) - IntersectCurrent.insert(*P); - } - } - - } //End while loop over Intersect Size - - //Change order - order = TOP_DOWN; - - //Reset IntersectCurrent to reflect changes in OrderNodes - IntersectCurrent.clear(); - succIntersect(*CurrentSet, IntersectCurrent); - } //End if BOTTOM_DOWN - - DEBUG(std::cerr << "Current Intersection Size: " << IntersectCurrent.size() << "\n"); - } - //End Wrapping while loop - DEBUG(std::cerr << "Ending Size of Current Set: " << CurrentSet->size() << "\n"); - }//End for over all sets of nodes - - //FIXME: As the algorithm stands it will NEVER add an instruction such as ba (with no - //data dependencies) to the final order. We add this manually. It will always be - //in the last set of S since its not part of a recurrence - //Loop over all the sets and place them in the final node order - std::vector<std::set<MSchedGraphNode*> > ::reverse_iterator LastSet = partialOrder.rbegin(); - for(std::set<MSchedGraphNode*>::iterator CurrentNode = LastSet->begin(), LastNode = LastSet->end(); - CurrentNode != LastNode; ++CurrentNode) { - if((*CurrentNode)->getInst()->getOpcode() == V9::BA) - FinalNodeOrder.push_back(*CurrentNode); - } - //Return final Order - //return FinalNodeOrder; -} - -bool ModuloSchedulingPass::computeSchedule(const MachineBasicBlock *BB, MSchedGraph *MSG) { - - TIME_REGION(X, "computeSchedule"); - - bool success = false; - - //FIXME: Should be set to max II of the original loop - //Cap II in order to prevent infinite loop - int capII = MSG->totalDelay(); - - while(!success) { - - //Keep track of branches, but do not insert into the schedule - std::vector<MSchedGraphNode*> branches; - - //Loop over the final node order and process each node - for(std::vector<MSchedGraphNode*>::iterator I = FinalNodeOrder.begin(), - E = FinalNodeOrder.end(); I != E; ++I) { - - //CalculateEarly and Late start - bool initialLSVal = false; - bool initialESVal = false; - int EarlyStart = 0; - int LateStart = 0; - bool hasSucc = false; - bool hasPred = false; - bool sched; - - if((*I)->isBranch()) - if((*I)->hasPredecessors()) - sched = true; - else - sched = false; - else - sched = true; - - if(sched) { - //Loop over nodes in the schedule and determine if they are predecessors - //or successors of the node we are trying to schedule - for(MSSchedule::schedule_iterator nodesByCycle = schedule.begin(), nodesByCycleEnd = schedule.end(); - nodesByCycle != nodesByCycleEnd; ++nodesByCycle) { - - //For this cycle, get the vector of nodes schedule and loop over it - for(std::vector<MSchedGraphNode*>::iterator schedNode = nodesByCycle->second.begin(), SNE = nodesByCycle->second.end(); schedNode != SNE; ++schedNode) { - - if((*I)->isPredecessor(*schedNode)) { - int diff = (*I)->getInEdge(*schedNode).getIteDiff(); - int ES_Temp = nodesByCycle->first + (*schedNode)->getLatency() - diff * II; - DEBUG(std::cerr << "Diff: " << diff << " Cycle: " << nodesByCycle->first << "\n"); - DEBUG(std::cerr << "Temp EarlyStart: " << ES_Temp << " Prev EarlyStart: " << EarlyStart << "\n"); - if(initialESVal) - EarlyStart = std::max(EarlyStart, ES_Temp); - else { - EarlyStart = ES_Temp; - initialESVal = true; - } - hasPred = true; - } - if((*I)->isSuccessor(*schedNode)) { - int diff = (*schedNode)->getInEdge(*I).getIteDiff(); - int LS_Temp = nodesByCycle->first - (*I)->getLatency() + diff * II; - DEBUG(std::cerr << "Diff: " << diff << " Cycle: " << nodesByCycle->first << "\n"); - DEBUG(std::cerr << "Temp LateStart: " << LS_Temp << " Prev LateStart: " << LateStart << "\n"); - if(initialLSVal) - LateStart = std::min(LateStart, LS_Temp); - else { - LateStart = LS_Temp; - initialLSVal = true; - } - hasSucc = true; - } - } - } - } - else { - branches.push_back(*I); - continue; - } - - //Check if this node is a pred or succ to a branch, and restrict its placement - //even though the branch is not in the schedule - /*int count = branches.size(); - for(std::vector<MSchedGraphNode*>::iterator B = branches.begin(), BE = branches.end(); - B != BE; ++B) { - if((*I)->isPredecessor(*B)) { - int diff = (*I)->getInEdge(*B).getIteDiff(); - int ES_Temp = (II+count-1) + (*B)->getLatency() - diff * II; - DEBUG(std::cerr << "Diff: " << diff << " Cycle: " << (II+count)-1 << "\n"); - DEBUG(std::cerr << "Temp EarlyStart: " << ES_Temp << " Prev EarlyStart: " << EarlyStart << "\n"); - EarlyStart = std::max(EarlyStart, ES_Temp); - hasPred = true; - } - - if((*I)->isSuccessor(*B)) { - int diff = (*B)->getInEdge(*I).getIteDiff(); - int LS_Temp = (II+count-1) - (*I)->getLatency() + diff * II; - DEBUG(std::cerr << "Diff: " << diff << " Cycle: " << (II+count-1) << "\n"); - DEBUG(std::cerr << "Temp LateStart: " << LS_Temp << " Prev LateStart: " << LateStart << "\n"); - LateStart = std::min(LateStart, LS_Temp); - hasSucc = true; - } - - count--; - }*/ - - //Check if the node has no pred or successors and set Early Start to its ASAP - if(!hasSucc && !hasPred) - EarlyStart = nodeToAttributesMap.find(*I)->second.ASAP; - - DEBUG(std::cerr << "Has Successors: " << hasSucc << ", Has Pred: " << hasPred << "\n"); - DEBUG(std::cerr << "EarlyStart: " << EarlyStart << ", LateStart: " << LateStart << "\n"); - - //Now, try to schedule this node depending upon its pred and successor in the schedule - //already - if(!hasSucc && hasPred) - success = scheduleNode(*I, EarlyStart, (EarlyStart + II -1)); - else if(!hasPred && hasSucc) - success = scheduleNode(*I, LateStart, (LateStart - II +1)); - else if(hasPred && hasSucc) { - if(EarlyStart > LateStart) { - success = false; - //LateStart = EarlyStart; - DEBUG(std::cerr << "Early Start can not be later then the late start cycle, schedule fails\n"); - } - else - success = scheduleNode(*I, EarlyStart, std::min(LateStart, (EarlyStart + II -1))); - } - else - success = scheduleNode(*I, EarlyStart, EarlyStart + II - 1); - - if(!success) { - ++II; - schedule.clear(); - break; - } - - } - - if(success) { - DEBUG(std::cerr << "Constructing Schedule Kernel\n"); - success = schedule.constructKernel(II, branches, indVarInstrs[BB]); - DEBUG(std::cerr << "Done Constructing Schedule Kernel\n"); - if(!success) { - ++II; - schedule.clear(); - } - DEBUG(std::cerr << "Final II: " << II << "\n"); - } - - - if(II >= capII) { - DEBUG(std::cerr << "Maximum II reached, giving up\n"); - return false; - } - - assert(II < capII && "The II should not exceed the original loop number of cycles"); - } - return true; -} - - -bool ModuloSchedulingPass::scheduleNode(MSchedGraphNode *node, - int start, int end) { - bool success = false; - - DEBUG(std::cerr << *node << " (Start Cycle: " << start << ", End Cycle: " << end << ")\n"); - - //Make sure start and end are not negative - //if(start < 0) { - //start = 0; - - //} - //if(end < 0) - //end = 0; - - bool forward = true; - if(start > end) - forward = false; - - bool increaseSC = true; - int cycle = start ; - - - while(increaseSC) { - - increaseSC = false; - - increaseSC = schedule.insert(node, cycle, II); - - if(!increaseSC) - return true; - - //Increment cycle to try again - if(forward) { - ++cycle; - DEBUG(std::cerr << "Increase cycle: " << cycle << "\n"); - if(cycle > end) - return false; - } - else { - --cycle; - DEBUG(std::cerr << "Decrease cycle: " << cycle << "\n"); - if(cycle < end) - return false; - } - } - - return success; -} - -void ModuloSchedulingPass::writePrologues(std::vector<MachineBasicBlock *> &prologues, MachineBasicBlock *origBB, std::vector<BasicBlock*> &llvm_prologues, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation) { - - //Keep a map to easily know whats in the kernel - std::map<int, std::set<const MachineInstr*> > inKernel; - int maxStageCount = 0; - - //Keep a map of new values we consumed in case they need to be added back - std::map<Value*, std::map<int, Value*> > consumedValues; - - MSchedGraphNode *branch = 0; - MSchedGraphNode *BAbranch = 0; - - DEBUG(schedule.print(std::cerr)); - - std::vector<MSchedGraphNode*> branches; - - for(MSSchedule::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { - maxStageCount = std::max(maxStageCount, I->second); - - //Put int the map so we know what instructions in each stage are in the kernel - DEBUG(std::cerr << "Inserting instruction " << *(I->first) << " into map at stage " << I->second << "\n"); - inKernel[I->second].insert(I->first); - } - - //Get target information to look at machine operands - const TargetInstrInfo *mii = target.getInstrInfo(); - - //Now write the prologues - for(int i = 0; i < maxStageCount; ++i) { - BasicBlock *llvmBB = new BasicBlock("PROLOGUE", (Function*) (origBB->getBasicBlock()->getParent())); - MachineBasicBlock *machineBB = new MachineBasicBlock(llvmBB); - - DEBUG(std::cerr << "i=" << i << "\n"); - for(int j = i; j >= 0; --j) { - for(MachineBasicBlock::const_iterator MI = origBB->begin(), ME = origBB->end(); ME != MI; ++MI) { - if(inKernel[j].count(&*MI)) { - MachineInstr *instClone = MI->clone(); - machineBB->push_back(instClone); - - //If its a branch, insert a nop - if(mii->isBranch(instClone->getOpcode())) - BuildMI(machineBB, V9::NOP, 0); - - - DEBUG(std::cerr << "Cloning: " << *MI << "\n"); - - //After cloning, we may need to save the value that this instruction defines - for(unsigned opNum=0; opNum < MI->getNumOperands(); ++opNum) { - Instruction *tmp; - - //get machine operand - MachineOperand &mOp = instClone->getOperand(opNum); - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { - - //Check if this is a value we should save - if(valuesToSave.count(mOp.getVRegValue())) { - //Save copy in tmpInstruction - tmp = new TmpInstruction(mOp.getVRegValue()); - - //Add TmpInstruction to safe LLVM Instruction MCFI - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) tmp); - - DEBUG(std::cerr << "Value: " << *(mOp.getVRegValue()) << " New Value: " << *tmp << " Stage: " << i << "\n"); - - newValues[mOp.getVRegValue()][i]= tmp; - newValLocation[tmp] = machineBB; - - DEBUG(std::cerr << "Machine Instr Operands: " << *(mOp.getVRegValue()) << ", 0, " << *tmp << "\n"); - - //Create machine instruction and put int machineBB - MachineInstr *saveValue; - if(mOp.getVRegValue()->getType() == Type::FloatTy) - saveValue = BuildMI(machineBB, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else if(mOp.getVRegValue()->getType() == Type::DoubleTy) - saveValue = BuildMI(machineBB, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else - saveValue = BuildMI(machineBB, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - - - DEBUG(std::cerr << "Created new machine instr: " << *saveValue << "\n"); - } - } - - //We may also need to update the value that we use if its from an earlier prologue - if(j != 0) { - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse()) { - if(newValues.count(mOp.getVRegValue())) { - if(newValues[mOp.getVRegValue()].count(i-1)) { - Value *oldV = mOp.getVRegValue(); - DEBUG(std::cerr << "Replaced this value: " << mOp.getVRegValue() << " With:" << (newValues[mOp.getVRegValue()][i-1]) << "\n"); - //Update the operand with the right value - mOp.setValueReg(newValues[mOp.getVRegValue()][i-1]); - - //Remove this value since we have consumed it - //NOTE: Should this only be done if j != maxStage? - consumedValues[oldV][i-1] = (newValues[oldV][i-1]); - DEBUG(std::cerr << "Deleted value: " << consumedValues[oldV][i-1] << "\n"); - newValues[oldV].erase(i-1); - } - } - else - if(consumedValues.count(mOp.getVRegValue())) - assert(!consumedValues[mOp.getVRegValue()].count(i-1) && "Found a case where we need the value"); - } - } - } - } - } - } - - MachineFunction *F = (((MachineBasicBlock*)origBB)->getParent()); - MachineFunction::BasicBlockListType &BL = F->getBasicBlockList(); - MachineFunction::BasicBlockListType::iterator BLI = origBB; - assert(BLI != BL.end() && "Must find original BB in machine function\n"); - BL.insert(BLI,machineBB); - prologues.push_back(machineBB); - llvm_prologues.push_back(llvmBB); - } -} - -void ModuloSchedulingPass::writeEpilogues(std::vector<MachineBasicBlock *> &epilogues, const MachineBasicBlock *origBB, std::vector<BasicBlock*> &llvm_epilogues, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues,std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs ) { - - std::map<int, std::set<const MachineInstr*> > inKernel; - - for(MSSchedule::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { - - //Ignore the branch, we will handle this separately - //if(I->first->isBranch()) - //continue; - - //Put int the map so we know what instructions in each stage are in the kernel - inKernel[I->second].insert(I->first); - } - - std::map<Value*, Value*> valPHIs; - - //some debug stuff, will remove later - DEBUG(for(std::map<Value*, std::map<int, Value*> >::iterator V = newValues.begin(), E = newValues.end(); V !=E; ++V) { - std::cerr << "Old Value: " << *(V->first) << "\n"; - for(std::map<int, Value*>::iterator I = V->second.begin(), IE = V->second.end(); I != IE; ++I) - std::cerr << "Stage: " << I->first << " Value: " << *(I->second) << "\n"; - }); - - //some debug stuff, will remove later - DEBUG(for(std::map<Value*, std::map<int, Value*> >::iterator V = kernelPHIs.begin(), E = kernelPHIs.end(); V !=E; ++V) { - std::cerr << "Old Value: " << *(V->first) << "\n"; - for(std::map<int, Value*>::iterator I = V->second.begin(), IE = V->second.end(); I != IE; ++I) - std::cerr << "Stage: " << I->first << " Value: " << *(I->second) << "\n"; - }); - - //Now write the epilogues - for(int i = schedule.getMaxStage()-1; i >= 0; --i) { - BasicBlock *llvmBB = new BasicBlock("EPILOGUE", (Function*) (origBB->getBasicBlock()->getParent())); - MachineBasicBlock *machineBB = new MachineBasicBlock(llvmBB); - - DEBUG(std::cerr << " Epilogue #: " << i << "\n"); - - - std::map<Value*, int> inEpilogue; - - for(MachineBasicBlock::const_iterator MI = origBB->begin(), ME = origBB->end(); ME != MI; ++MI) { - for(int j=schedule.getMaxStage(); j > i; --j) { - if(inKernel[j].count(&*MI)) { - DEBUG(std::cerr << "Cloning instruction " << *MI << "\n"); - MachineInstr *clone = MI->clone(); - - //Update operands that need to use the result from the phi - for(unsigned opNum=0; opNum < clone->getNumOperands(); ++opNum) { - //get machine operand - const MachineOperand &mOp = clone->getOperand(opNum); - - if((mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse())) { - - DEBUG(std::cerr << "Writing PHI for " << (mOp.getVRegValue()) << "\n"); - - //If this is the last instructions for the max iterations ago, don't update operands - if(inEpilogue.count(mOp.getVRegValue())) - if(inEpilogue[mOp.getVRegValue()] == i) - continue; - - //Quickly write appropriate phis for this operand - if(newValues.count(mOp.getVRegValue())) { - if(newValues[mOp.getVRegValue()].count(i)) { - Instruction *tmp = new TmpInstruction(newValues[mOp.getVRegValue()][i]); - - //Get machine code for this instruction - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) tmp); - - //assert of no kernelPHI for this value - assert(kernelPHIs[mOp.getVRegValue()][i] !=0 && "Must have final kernel phi to construct epilogue phi"); - - MachineInstr *saveValue = BuildMI(machineBB, V9::PHI, 3).addReg(newValues[mOp.getVRegValue()][i]).addReg(kernelPHIs[mOp.getVRegValue()][i]).addRegDef(tmp); - DEBUG(std::cerr << "Resulting PHI: " << *saveValue << "\n"); - valPHIs[mOp.getVRegValue()] = tmp; - } - } - - if(valPHIs.count(mOp.getVRegValue())) { - //Update the operand in the cloned instruction - clone->getOperand(opNum).setValueReg(valPHIs[mOp.getVRegValue()]); - } - } - else if((mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef())) { - inEpilogue[mOp.getVRegValue()] = i; - } - } - machineBB->push_back(clone); - } - } - } - - MachineFunction *F = (((MachineBasicBlock*)origBB)->getParent()); - MachineFunction::BasicBlockListType &BL = F->getBasicBlockList(); - MachineFunction::BasicBlockListType::iterator BLI = (MachineBasicBlock*) origBB; - assert(BLI != BL.end() && "Must find original BB in machine function\n"); - BL.insert(BLI,machineBB); - epilogues.push_back(machineBB); - llvm_epilogues.push_back(llvmBB); - - DEBUG(std::cerr << "EPILOGUE #" << i << "\n"); - DEBUG(machineBB->print(std::cerr)); - } -} - -void ModuloSchedulingPass::writeKernel(BasicBlock *llvmBB, MachineBasicBlock *machineBB, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs) { - - //Keep track of operands that are read and saved from a previous iteration. The new clone - //instruction will use the result of the phi instead. - std::map<Value*, Value*> finalPHIValue; - std::map<Value*, Value*> kernelValue; - - //Branches are a special case - std::vector<MachineInstr*> branches; - - //Get target information to look at machine operands - const TargetInstrInfo *mii = target.getInstrInfo(); - - //Create TmpInstructions for the final phis - for(MSSchedule::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { - - DEBUG(std::cerr << "Stage: " << I->second << " Inst: " << *(I->first) << "\n";); - - //Clone instruction - const MachineInstr *inst = I->first; - MachineInstr *instClone = inst->clone(); - - //Insert into machine basic block - machineBB->push_back(instClone); - - if(mii->isBranch(instClone->getOpcode())) - BuildMI(machineBB, V9::NOP, 0); - - DEBUG(std::cerr << "Cloned Inst: " << *instClone << "\n"); - - //Loop over Machine Operands - for(unsigned i=0; i < inst->getNumOperands(); ++i) { - //get machine operand - const MachineOperand &mOp = inst->getOperand(i); - - if(I->second != 0) { - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse()) { - - //Check to see where this operand is defined if this instruction is from max stage - if(I->second == schedule.getMaxStage()) { - DEBUG(std::cerr << "VREG: " << *(mOp.getVRegValue()) << "\n"); - } - - //If its in the value saved, we need to create a temp instruction and use that instead - if(valuesToSave.count(mOp.getVRegValue())) { - - //Check if we already have a final PHI value for this - if(!finalPHIValue.count(mOp.getVRegValue())) { - //Only create phi if the operand def is from a stage before this one - if(schedule.defPreviousStage(mOp.getVRegValue(), I->second)) { - TmpInstruction *tmp = new TmpInstruction(mOp.getVRegValue()); - - //Get machine code for this instruction - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) tmp); - - //Update the operand in the cloned instruction - instClone->getOperand(i).setValueReg(tmp); - - //save this as our final phi - finalPHIValue[mOp.getVRegValue()] = tmp; - newValLocation[tmp] = machineBB; - } - } - else { - //Use the previous final phi value - instClone->getOperand(i).setValueReg(finalPHIValue[mOp.getVRegValue()]); - } - } - } - } - if(I->second != schedule.getMaxStage()) { - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { - if(valuesToSave.count(mOp.getVRegValue())) { - - TmpInstruction *tmp = new TmpInstruction(mOp.getVRegValue()); - - //Get machine code for this instruction - MachineCodeForInstruction & tempVec = MachineCodeForInstruction::get(defaultInst); - tempVec.addTemp((Value*) tmp); - - //Create new machine instr and put in MBB - MachineInstr *saveValue; - if(mOp.getVRegValue()->getType() == Type::FloatTy) - saveValue = BuildMI(machineBB, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else if(mOp.getVRegValue()->getType() == Type::DoubleTy) - saveValue = BuildMI(machineBB, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else - saveValue = BuildMI(machineBB, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - - - //Save for future cleanup - kernelValue[mOp.getVRegValue()] = tmp; - newValLocation[tmp] = machineBB; - kernelPHIs[mOp.getVRegValue()][schedule.getMaxStage()-1] = tmp; - } - } - } - } - - } - - //Add branches - for(std::vector<MachineInstr*>::iterator I = branches.begin(), E = branches.end(); I != E; ++I) { - machineBB->push_back(*I); - BuildMI(machineBB, V9::NOP, 0); - } - - - DEBUG(std::cerr << "KERNEL before PHIs\n"); - DEBUG(machineBB->print(std::cerr)); - - - //Loop over each value we need to generate phis for - for(std::map<Value*, std::map<int, Value*> >::iterator V = newValues.begin(), - E = newValues.end(); V != E; ++V) { - - - DEBUG(std::cerr << "Writing phi for" << *(V->first)); - DEBUG(std::cerr << "\nMap of Value* for this phi\n"); - DEBUG(for(std::map<int, Value*>::iterator I = V->second.begin(), - IE = V->second.end(); I != IE; ++I) { - std::cerr << "Stage: " << I->first; - std::cerr << " Value: " << *(I->second) << "\n"; - }); - - //If we only have one current iteration live, its safe to set lastPhi = to kernel value - if(V->second.size() == 1) { - assert(kernelValue[V->first] != 0 && "Kernel value* must exist to create phi"); - MachineInstr *saveValue = BuildMI(*machineBB, machineBB->begin(),V9::PHI, 3).addReg(V->second.begin()->second).addReg(kernelValue[V->first]).addRegDef(finalPHIValue[V->first]); - DEBUG(std::cerr << "Resulting PHI (one live): " << *saveValue << "\n"); - kernelPHIs[V->first][V->second.begin()->first] = kernelValue[V->first]; - DEBUG(std::cerr << "Put kernel phi in at stage: " << schedule.getMaxStage()-1 << " (map stage = " << V->second.begin()->first << ")\n"); - } - else { - - //Keep track of last phi created. - Instruction *lastPhi = 0; - - unsigned count = 1; - //Loop over the the map backwards to generate phis - for(std::map<int, Value*>::reverse_iterator I = V->second.rbegin(), IE = V->second.rend(); - I != IE; ++I) { - - if(count < (V->second).size()) { - if(lastPhi == 0) { - lastPhi = new TmpInstruction(I->second); - - //Get machine code for this instruction - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) lastPhi); - - MachineInstr *saveValue = BuildMI(*machineBB, machineBB->begin(), V9::PHI, 3).addReg(kernelValue[V->first]).addReg(I->second).addRegDef(lastPhi); - DEBUG(std::cerr << "Resulting PHI: " << *saveValue << "\n"); - newValLocation[lastPhi] = machineBB; - } - else { - Instruction *tmp = new TmpInstruction(I->second); - - //Get machine code for this instruction - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) tmp); - - - MachineInstr *saveValue = BuildMI(*machineBB, machineBB->begin(), V9::PHI, 3).addReg(lastPhi).addReg(I->second).addRegDef(tmp); - DEBUG(std::cerr << "Resulting PHI: " << *saveValue << "\n"); - lastPhi = tmp; - kernelPHIs[V->first][I->first] = lastPhi; - newValLocation[lastPhi] = machineBB; - } - } - //Final phi value - else { - //The resulting value must be the Value* we created earlier - assert(lastPhi != 0 && "Last phi is NULL!\n"); - MachineInstr *saveValue = BuildMI(*machineBB, machineBB->begin(), V9::PHI, 3).addReg(lastPhi).addReg(I->second).addRegDef(finalPHIValue[V->first]); - DEBUG(std::cerr << "Resulting PHI: " << *saveValue << "\n"); - kernelPHIs[V->first][I->first] = finalPHIValue[V->first]; - } - - ++count; - } - - } - } - - DEBUG(std::cerr << "KERNEL after PHIs\n"); - DEBUG(machineBB->print(std::cerr)); -} - - -void ModuloSchedulingPass::removePHIs(const MachineBasicBlock *origBB, std::vector<MachineBasicBlock *> &prologues, std::vector<MachineBasicBlock *> &epilogues, MachineBasicBlock *kernelBB, std::map<Value*, MachineBasicBlock*> &newValLocation) { - - //Worklist to delete things - std::vector<std::pair<MachineBasicBlock*, MachineBasicBlock::iterator> > worklist; - - //Worklist of TmpInstructions that need to be added to a MCFI - std::vector<Instruction*> addToMCFI; - - //Worklist to add OR instructions to end of kernel so not to invalidate the iterator - //std::vector<std::pair<Instruction*, Value*> > newORs; - - const TargetInstrInfo *TMI = target.getInstrInfo(); - - //Start with the kernel and for each phi insert a copy for the phi def and for each arg - for(MachineBasicBlock::iterator I = kernelBB->begin(), E = kernelBB->end(); I != E; ++I) { - - DEBUG(std::cerr << "Looking at Instr: " << *I << "\n"); - //Get op code and check if its a phi - if(I->getOpcode() == V9::PHI) { - - DEBUG(std::cerr << "Replacing PHI: " << *I << "\n"); - Instruction *tmp = 0; - - for(unsigned i = 0; i < I->getNumOperands(); ++i) { - //Get Operand - const MachineOperand &mOp = I->getOperand(i); - assert(mOp.getType() == MachineOperand::MO_VirtualRegister && "Should be a Value*\n"); - - if(!tmp) { - tmp = new TmpInstruction(mOp.getVRegValue()); - addToMCFI.push_back(tmp); - } - - //Now for all our arguments we read, OR to the new TmpInstruction that we created - if(mOp.isUse()) { - DEBUG(std::cerr << "Use: " << mOp << "\n"); - //Place a copy at the end of its BB but before the branches - assert(newValLocation.count(mOp.getVRegValue()) && "We must know where this value is located\n"); - //Reverse iterate to find the branches, we can safely assume no instructions have been - //put in the nop positions - for(MachineBasicBlock::iterator inst = --(newValLocation[mOp.getVRegValue()])->end(), endBB = (newValLocation[mOp.getVRegValue()])->begin(); inst != endBB; --inst) { - MachineOpCode opc = inst->getOpcode(); - if(TMI->isBranch(opc) || TMI->isNop(opc)) - continue; - else { - if(mOp.getVRegValue()->getType() == Type::FloatTy) - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else if(mOp.getVRegValue()->getType() == Type::DoubleTy) - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - - break; - } - - } - - } - else { - //Remove the phi and replace it with an OR - DEBUG(std::cerr << "Def: " << mOp << "\n"); - //newORs.push_back(std::make_pair(tmp, mOp.getVRegValue())); - if(tmp->getType() == Type::FloatTy) - BuildMI(*kernelBB, I, V9::FMOVS, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else if(tmp->getType() == Type::DoubleTy) - BuildMI(*kernelBB, I, V9::FMOVD, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else - BuildMI(*kernelBB, I, V9::ORr, 3).addReg(tmp).addImm(0).addRegDef(mOp.getVRegValue()); - - - worklist.push_back(std::make_pair(kernelBB, I)); - } - - } - - } - - - } - - //Add TmpInstructions to some MCFI - if(addToMCFI.size() > 0) { - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - for(unsigned x = 0; x < addToMCFI.size(); ++x) { - tempMvec.addTemp(addToMCFI[x]); - } - addToMCFI.clear(); - } - - - //Remove phis from epilogue - for(std::vector<MachineBasicBlock*>::iterator MB = epilogues.begin(), ME = epilogues.end(); MB != ME; ++MB) { - for(MachineBasicBlock::iterator I = (*MB)->begin(), E = (*MB)->end(); I != E; ++I) { - - DEBUG(std::cerr << "Looking at Instr: " << *I << "\n"); - //Get op code and check if its a phi - if(I->getOpcode() == V9::PHI) { - Instruction *tmp = 0; - - for(unsigned i = 0; i < I->getNumOperands(); ++i) { - //Get Operand - const MachineOperand &mOp = I->getOperand(i); - assert(mOp.getType() == MachineOperand::MO_VirtualRegister && "Should be a Value*\n"); - - if(!tmp) { - tmp = new TmpInstruction(mOp.getVRegValue()); - addToMCFI.push_back(tmp); - } - - //Now for all our arguments we read, OR to the new TmpInstruction that we created - if(mOp.isUse()) { - DEBUG(std::cerr << "Use: " << mOp << "\n"); - //Place a copy at the end of its BB but before the branches - assert(newValLocation.count(mOp.getVRegValue()) && "We must know where this value is located\n"); - //Reverse iterate to find the branches, we can safely assume no instructions have been - //put in the nop positions - for(MachineBasicBlock::iterator inst = --(newValLocation[mOp.getVRegValue()])->end(), endBB = (newValLocation[mOp.getVRegValue()])->begin(); inst != endBB; --inst) { - MachineOpCode opc = inst->getOpcode(); - if(TMI->isBranch(opc) || TMI->isNop(opc)) - continue; - else { - if(mOp.getVRegValue()->getType() == Type::FloatTy) - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else if(mOp.getVRegValue()->getType() == Type::DoubleTy) - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - - - break; - } - - } - - } - else { - //Remove the phi and replace it with an OR - DEBUG(std::cerr << "Def: " << mOp << "\n"); - if(tmp->getType() == Type::FloatTy) - BuildMI(**MB, I, V9::FMOVS, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else if(tmp->getType() == Type::DoubleTy) - BuildMI(**MB, I, V9::FMOVD, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else - BuildMI(**MB, I, V9::ORr, 3).addReg(tmp).addImm(0).addRegDef(mOp.getVRegValue()); - - worklist.push_back(std::make_pair(*MB,I)); - } - - } - } - - - } - } - - - if(addToMCFI.size() > 0) { - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - for(unsigned x = 0; x < addToMCFI.size(); ++x) { - tempMvec.addTemp(addToMCFI[x]); - } - addToMCFI.clear(); - } - - //Delete the phis - for(std::vector<std::pair<MachineBasicBlock*, MachineBasicBlock::iterator> >::iterator I = worklist.begin(), E = worklist.end(); I != E; ++I) { - - DEBUG(std::cerr << "Deleting PHI " << *I->second << "\n"); - I->first->erase(I->second); - - } - - - assert((addToMCFI.size() == 0) && "We should have added all TmpInstructions to some MachineCodeForInstruction"); -} - - -void ModuloSchedulingPass::reconstructLoop(MachineBasicBlock *BB) { - - TIME_REGION(X, "reconstructLoop"); - - - DEBUG(std::cerr << "Reconstructing Loop\n"); - - //First find the value *'s that we need to "save" - std::map<const Value*, std::pair<const MachineInstr*, int> > valuesToSave; - - //Keep track of instructions we have already seen and their stage because - //we don't want to "save" values if they are used in the kernel immediately - std::map<const MachineInstr*, int> lastInstrs; - std::map<const Value*, int> phiUses; - - //Loop over kernel and only look at instructions from a stage > 0 - //Look at its operands and save values *'s that are read - for(MSSchedule::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { - - if(I->second !=0) { - //For this instruction, get the Value*'s that it reads and put them into the set. - //Assert if there is an operand of another type that we need to save - const MachineInstr *inst = I->first; - lastInstrs[inst] = I->second; - - for(unsigned i=0; i < inst->getNumOperands(); ++i) { - //get machine operand - const MachineOperand &mOp = inst->getOperand(i); - - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse()) { - //find the value in the map - if (const Value* srcI = mOp.getVRegValue()) { - - if(isa<Constant>(srcI) || isa<Argument>(srcI)) - continue; - - //Before we declare this Value* one that we should save - //make sure its def is not of the same stage as this instruction - //because it will be consumed before its used - Instruction *defInst = (Instruction*) srcI; - - //Should we save this value? - bool save = true; - - //Continue if not in the def map, loop invariant code does not need to be saved - if(!defMap.count(srcI)) - continue; - - MachineInstr *defInstr = defMap[srcI]; - - - if(lastInstrs.count(defInstr)) { - if(lastInstrs[defInstr] == I->second) { - save = false; - - } - } - - if(save) { - assert(!phiUses.count(srcI) && "Did not expect to see phi use twice"); - if(isa<PHINode>(srcI)) - phiUses[srcI] = I->second; - - valuesToSave[srcI] = std::make_pair(I->first, i); - - } - } - } - else if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { - if (const Value* destI = mOp.getVRegValue()) { - if(!isa<PHINode>(destI)) - continue; - if(phiUses.count(destI)) { - if(phiUses[destI] == I->second) { - //remove from save list - valuesToSave.erase(destI); - } - } - } - } - - if(mOp.getType() != MachineOperand::MO_VirtualRegister && mOp.isUse()) { - assert("Our assumption is wrong. We have another type of register that needs to be saved\n"); - } - } - } - } - - //The new loop will consist of one or more prologues, the kernel, and one or more epilogues. - - //Map to keep track of old to new values - std::map<Value*, std::map<int, Value*> > newValues; - - //Map to keep track of old to new values in kernel - std::map<Value*, std::map<int, Value*> > kernelPHIs; - - //Another map to keep track of what machine basic blocks these new value*s are in since - //they have no llvm instruction equivalent - std::map<Value*, MachineBasicBlock*> newValLocation; - - std::vector<MachineBasicBlock*> prologues; - std::vector<BasicBlock*> llvm_prologues; - - - //Write prologue - if(schedule.getMaxStage() != 0) - writePrologues(prologues, BB, llvm_prologues, valuesToSave, newValues, newValLocation); - - //Print out epilogues and prologue - DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = prologues.begin(), E = prologues.end(); - I != E; ++I) { - std::cerr << "PROLOGUE\n"; - (*I)->print(std::cerr); - }); - - BasicBlock *llvmKernelBB = new BasicBlock("Kernel", (Function*) (BB->getBasicBlock()->getParent())); - MachineBasicBlock *machineKernelBB = new MachineBasicBlock(llvmKernelBB); - - MachineFunction *F = (((MachineBasicBlock*)BB)->getParent()); - MachineFunction::BasicBlockListType &BL = F->getBasicBlockList(); - MachineFunction::BasicBlockListType::iterator BLI = BB; - assert(BLI != BL.end() && "Must find original BB in machine function\n"); - BL.insert(BLI,machineKernelBB); - - //(((MachineBasicBlock*)BB)->getParent())->getBasicBlockList().push_back(machineKernelBB); - writeKernel(llvmKernelBB, machineKernelBB, valuesToSave, newValues, newValLocation, kernelPHIs); - - - std::vector<MachineBasicBlock*> epilogues; - std::vector<BasicBlock*> llvm_epilogues; - - //Write epilogues - if(schedule.getMaxStage() != 0) - writeEpilogues(epilogues, BB, llvm_epilogues, valuesToSave, newValues, newValLocation, kernelPHIs); - - - //Fix our branches - fixBranches(prologues, llvm_prologues, machineKernelBB, llvmKernelBB, epilogues, llvm_epilogues, BB); - - //Remove phis - removePHIs(BB, prologues, epilogues, machineKernelBB, newValLocation); - - //Print out epilogues and prologue - DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = prologues.begin(), E = prologues.end(); - I != E; ++I) { - std::cerr << "PROLOGUE\n"; - (*I)->print(std::cerr); - }); - - DEBUG(std::cerr << "KERNEL\n"); - DEBUG(machineKernelBB->print(std::cerr)); - - DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = epilogues.begin(), E = epilogues.end(); - I != E; ++I) { - std::cerr << "EPILOGUE\n"; - (*I)->print(std::cerr); - }); - - - DEBUG(std::cerr << "New Machine Function" << "\n"); - DEBUG(std::cerr << BB->getParent() << "\n"); - - -} - -void ModuloSchedulingPass::fixBranches(std::vector<MachineBasicBlock *> &prologues, std::vector<BasicBlock*> &llvm_prologues, MachineBasicBlock *machineKernelBB, BasicBlock *llvmKernelBB, std::vector<MachineBasicBlock *> &epilogues, std::vector<BasicBlock*> &llvm_epilogues, MachineBasicBlock *BB) { - - const TargetInstrInfo *TMI = target.getInstrInfo(); - - if(schedule.getMaxStage() != 0) { - //Fix prologue branches - for(unsigned I = 0; I < prologues.size(); ++I) { - - //Find terminator since getFirstTerminator does not work! - for(MachineBasicBlock::reverse_iterator mInst = prologues[I]->rbegin(), mInstEnd = prologues[I]->rend(); mInst != mInstEnd; ++mInst) { - MachineOpCode OC = mInst->getOpcode(); - //If its a branch update its branchto - if(TMI->isBranch(OC)) { - for(unsigned opNum = 0; opNum < mInst->getNumOperands(); ++opNum) { - MachineOperand &mOp = mInst->getOperand(opNum); - if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - //Check if we are branching to the kernel, if not branch to epilogue - if(mOp.getVRegValue() == BB->getBasicBlock()) { - if(I == prologues.size()-1) - mOp.setValueReg(llvmKernelBB); - else - mOp.setValueReg(llvm_prologues[I+1]); - } - else { - mOp.setValueReg(llvm_epilogues[(llvm_epilogues.size()-1-I)]); - } - } - } - - DEBUG(std::cerr << "New Prologue Branch: " << *mInst << "\n"); - } - } - - - //Update llvm basic block with our new branch instr - DEBUG(std::cerr << BB->getBasicBlock()->getTerminator() << "\n"); - const BranchInst *branchVal = dyn_cast<BranchInst>(BB->getBasicBlock()->getTerminator()); - - if(I == prologues.size()-1) { - TerminatorInst *newBranch = new BranchInst(llvmKernelBB, - llvm_epilogues[(llvm_epilogues.size()-1-I)], - branchVal->getCondition(), - llvm_prologues[I]); - } - else - TerminatorInst *newBranch = new BranchInst(llvm_prologues[I+1], - llvm_epilogues[(llvm_epilogues.size()-1-I)], - branchVal->getCondition(), - llvm_prologues[I]); - - } - } - - Value *origBranchExit = 0; - - //Fix up kernel machine branches - for(MachineBasicBlock::reverse_iterator mInst = machineKernelBB->rbegin(), mInstEnd = machineKernelBB->rend(); mInst != mInstEnd; ++mInst) { - MachineOpCode OC = mInst->getOpcode(); - if(TMI->isBranch(OC)) { - for(unsigned opNum = 0; opNum < mInst->getNumOperands(); ++opNum) { - MachineOperand &mOp = mInst->getOperand(opNum); - - if(mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - if(mOp.getVRegValue() == BB->getBasicBlock()) - mOp.setValueReg(llvmKernelBB); - else - if(llvm_epilogues.size() > 0) { - assert(origBranchExit == 0 && "There should only be one branch out of the loop"); - - origBranchExit = mOp.getVRegValue(); - mOp.setValueReg(llvm_epilogues[0]); - } - else - origBranchExit = mOp.getVRegValue(); - } - } - } - } - - //Update kernelLLVM branches - const BranchInst *branchVal = dyn_cast<BranchInst>(BB->getBasicBlock()->getTerminator()); - - assert(origBranchExit != 0 && "We must have the original bb the kernel exits to!"); - - if(epilogues.size() > 0) { - TerminatorInst *newBranch = new BranchInst(llvmKernelBB, - llvm_epilogues[0], - branchVal->getCondition(), - llvmKernelBB); - } - else { - BasicBlock *origBBExit = dyn_cast<BasicBlock>(origBranchExit); - assert(origBBExit !=0 && "Original exit basic block must be set"); - TerminatorInst *newBranch = new BranchInst(llvmKernelBB, - origBBExit, - branchVal->getCondition(), - llvmKernelBB); - } - - if(schedule.getMaxStage() != 0) { - //Lastly add unconditional branches for the epilogues - for(unsigned I = 0; I < epilogues.size(); ++I) { - - //Now since we don't have fall throughs, add a unconditional branch to the next prologue - if(I != epilogues.size()-1) { - BuildMI(epilogues[I], V9::BA, 1).addPCDisp(llvm_epilogues[I+1]); - //Add unconditional branch to end of epilogue - TerminatorInst *newBranch = new BranchInst(llvm_epilogues[I+1], - llvm_epilogues[I]); - - } - else { - BuildMI(epilogues[I], V9::BA, 1).addPCDisp(origBranchExit); - - - //Update last epilogue exit branch - BranchInst *branchVal = (BranchInst*) dyn_cast<BranchInst>(BB->getBasicBlock()->getTerminator()); - //Find where we are supposed to branch to - BasicBlock *nextBlock = 0; - for(unsigned j=0; j <branchVal->getNumSuccessors(); ++j) { - if(branchVal->getSuccessor(j) != BB->getBasicBlock()) - nextBlock = branchVal->getSuccessor(j); - } - - assert((nextBlock != 0) && "Next block should not be null!"); - TerminatorInst *newBranch = new BranchInst(nextBlock, llvm_epilogues[I]); - } - //Add one more nop! - BuildMI(epilogues[I], V9::NOP, 0); - - } - } - - //FIX UP Machine BB entry!! - //We are looking at the predecesor of our loop basic block and we want to change its ba instruction - - - //Find all llvm basic blocks that branch to the loop entry and change to our first prologue. - const BasicBlock *llvmBB = BB->getBasicBlock(); - - std::vector<const BasicBlock*>Preds (pred_begin(llvmBB), pred_end(llvmBB)); - - //for(pred_const_iterator P = pred_begin(llvmBB), PE = pred_end(llvmBB); P != PE; ++PE) { - for(std::vector<const BasicBlock*>::iterator P = Preds.begin(), PE = Preds.end(); P != PE; ++P) { - if(*P == llvmBB) - continue; - else { - DEBUG(std::cerr << "Found our entry BB\n"); - //Get the Terminator instruction for this basic block and print it out - DEBUG(std::cerr << *((*P)->getTerminator()) << "\n"); - //Update the terminator - TerminatorInst *term = ((BasicBlock*)*P)->getTerminator(); - for(unsigned i=0; i < term->getNumSuccessors(); ++i) { - if(term->getSuccessor(i) == llvmBB) { - DEBUG(std::cerr << "Replacing successor bb\n"); - if(llvm_prologues.size() > 0) { - term->setSuccessor(i, llvm_prologues[0]); - //Also update its corresponding machine instruction - MachineCodeForInstruction & tempMvec = - MachineCodeForInstruction::get(term); - for (unsigned j = 0; j < tempMvec.size(); j++) { - MachineInstr *temp = tempMvec[j]; - MachineOpCode opc = temp->getOpcode(); - if(TMI->isBranch(opc)) { - DEBUG(std::cerr << *temp << "\n"); - //Update branch - for(unsigned opNum = 0; opNum < temp->getNumOperands(); ++opNum) { - MachineOperand &mOp = temp->getOperand(opNum); - if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - if(mOp.getVRegValue() == llvmBB) - mOp.setValueReg(llvm_prologues[0]); - } - } - } - } - } - else { - term->setSuccessor(i, llvmKernelBB); - //Also update its corresponding machine instruction - MachineCodeForInstruction & tempMvec = - MachineCodeForInstruction::get(term); - for (unsigned j = 0; j < tempMvec.size(); j++) { - MachineInstr *temp = tempMvec[j]; - MachineOpCode opc = temp->getOpcode(); - if(TMI->isBranch(opc)) { - DEBUG(std::cerr << *temp << "\n"); - //Update branch - for(unsigned opNum = 0; opNum < temp->getNumOperands(); ++opNum) { - MachineOperand &mOp = temp->getOperand(opNum); - if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - if(mOp.getVRegValue() == llvmBB) - mOp.setValueReg(llvmKernelBB); - } - } - } - } - } - } - } - break; - } - } - - - //BB->getParent()->getBasicBlockList().erase(BB); - -} - diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.h b/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.h deleted file mode 100644 index 840623e02d7..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.h +++ /dev/null @@ -1,171 +0,0 @@ -//===-- ModuloScheduling.h - Swing Modulo Scheduling------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_MODULOSCHEDULING_H -#define LLVM_MODULOSCHEDULING_H - -#include "MSchedGraph.h" -#include "MSSchedule.h" -#include "llvm/Function.h" -#include "llvm/Pass.h" -#include "DependenceAnalyzer.h" -#include "llvm/Target/TargetData.h" -#include "llvm/Analysis/LoopInfo.h" -#include "llvm/Analysis/ScalarEvolution.h" -#include <set> - -namespace llvm { - - - //Struct to contain ModuloScheduling Specific Information for each node - struct MSNodeAttributes { - int ASAP; //Earliest time at which the opreation can be scheduled - int ALAP; //Latest time at which the operation can be scheduled. - int MOB; - int depth; - int height; - MSNodeAttributes(int asap=-1, int alap=-1, int mob=-1, - int d=-1, int h=-1) : ASAP(asap), ALAP(alap), - MOB(mob), depth(d), - height(h) {} - }; - - - class ModuloSchedulingPass : public FunctionPass { - const TargetMachine ⌖ - - //Map to hold Value* defs - std::map<const Value*, MachineInstr*> defMap; - - //Map to hold list of instructions associate to the induction var for each BB - std::map<const MachineBasicBlock*, std::map<const MachineInstr*, unsigned> > indVarInstrs; - - //Map to hold machine to llvm instrs for each valid BB - std::map<const MachineBasicBlock*, std::map<MachineInstr*, Instruction*> > machineTollvm; - - //LLVM Instruction we know we can add TmpInstructions to its MCFI - Instruction *defaultInst; - - //Map that holds node to node attribute information - std::map<MSchedGraphNode*, MSNodeAttributes> nodeToAttributesMap; - - //Map to hold all reccurrences - std::set<std::pair<int, std::vector<MSchedGraphNode*> > > recurrenceList; - - //Set of edges to ignore, stored as src node and index into vector of successors - std::set<std::pair<MSchedGraphNode*, unsigned> > edgesToIgnore; - - //Vector containing the partial order - std::vector<std::set<MSchedGraphNode*> > partialOrder; - - //Vector containing the final node order - std::vector<MSchedGraphNode*> FinalNodeOrder; - - //Schedule table, key is the cycle number and the vector is resource, node pairs - MSSchedule schedule; - - //Current initiation interval - int II; - - //Internal functions - bool CreateDefMap(MachineBasicBlock *BI); - bool MachineBBisValid(const MachineBasicBlock *BI); - bool assocIndVar(Instruction *I, std::set<Instruction*> &indVar, - std::vector<Instruction*> &stack, BasicBlock *BB); - int calculateResMII(const MachineBasicBlock *BI); - int calculateRecMII(MSchedGraph *graph, int MII); - void calculateNodeAttributes(MSchedGraph *graph, int MII); - - bool ignoreEdge(MSchedGraphNode *srcNode, MSchedGraphNode *destNode); - - int calculateASAP(MSchedGraphNode *node, int MII,MSchedGraphNode *destNode); - int calculateALAP(MSchedGraphNode *node, int MII, int maxASAP, MSchedGraphNode *srcNode); - - int calculateHeight(MSchedGraphNode *node,MSchedGraphNode *srcNode); - int calculateDepth(MSchedGraphNode *node, MSchedGraphNode *destNode); - - int findMaxASAP(); - void orderNodes(); - void findAllReccurrences(MSchedGraphNode *node, - std::vector<MSchedGraphNode*> &visitedNodes, int II); - void addReccurrence(std::vector<MSchedGraphNode*> &recurrence, int II, MSchedGraphNode*, MSchedGraphNode*); - void addSCC(std::vector<MSchedGraphNode*> &SCC, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes); - - void findAllCircuits(MSchedGraph *MSG, int II); - bool circuit(MSchedGraphNode *v, std::vector<MSchedGraphNode*> &stack, - std::set<MSchedGraphNode*> &blocked, - std::vector<MSchedGraphNode*> &SCC, MSchedGraphNode *s, - std::map<MSchedGraphNode*, std::set<MSchedGraphNode*> > &B, int II, - std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes); - - void unblock(MSchedGraphNode *u, std::set<MSchedGraphNode*> &blocked, - std::map<MSchedGraphNode*, std::set<MSchedGraphNode*> > &B); - - void addRecc(std::vector<MSchedGraphNode*> &stack, std::map<MSchedGraphNode*, MSchedGraphNode*> &newNodes); - - void searchPath(MSchedGraphNode *node, - std::vector<MSchedGraphNode*> &path, - std::set<MSchedGraphNode*> &nodesToAdd, - std::set<MSchedGraphNode*> &new_reccurence); - - void pathToRecc(MSchedGraphNode *node, - std::vector<MSchedGraphNode*> &path, - std::set<MSchedGraphNode*> &poSet, std::set<MSchedGraphNode*> &lastNodes); - - void computePartialOrder(); - - bool computeSchedule(const MachineBasicBlock *BB, MSchedGraph *MSG); - bool scheduleNode(MSchedGraphNode *node, - int start, int end); - - void predIntersect(std::set<MSchedGraphNode*> &CurrentSet, std::set<MSchedGraphNode*> &IntersectResult); - void succIntersect(std::set<MSchedGraphNode*> &CurrentSet, std::set<MSchedGraphNode*> &IntersectResult); - - void reconstructLoop(MachineBasicBlock*); - - //void saveValue(const MachineInstr*, const std::set<Value*>&, std::vector<Value*>*); - - void fixBranches(std::vector<MachineBasicBlock *> &prologues, std::vector<BasicBlock*> &llvm_prologues, MachineBasicBlock *machineBB, BasicBlock *llvmBB, std::vector<MachineBasicBlock *> &epilogues, std::vector<BasicBlock*> &llvm_epilogues, MachineBasicBlock*); - - void writePrologues(std::vector<MachineBasicBlock *> &prologues, MachineBasicBlock *origBB, std::vector<BasicBlock*> &llvm_prologues, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation); - - void writeEpilogues(std::vector<MachineBasicBlock *> &epilogues, const MachineBasicBlock *origBB, std::vector<BasicBlock*> &llvm_epilogues, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave,std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs); - - - void writeKernel(BasicBlock *llvmBB, MachineBasicBlock *machineBB, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs); - - void removePHIs(const MachineBasicBlock* SB, std::vector<MachineBasicBlock*> &prologues, std::vector<MachineBasicBlock *> &epilogues, MachineBasicBlock *kernelBB, std::map<Value*, MachineBasicBlock*> &newValLocation); - - void connectedComponentSet(MSchedGraphNode *node, std::set<MSchedGraphNode*> &ccSet, std::set<MSchedGraphNode*> &lastNodes); - - public: - ModuloSchedulingPass(TargetMachine &targ) : target(targ) {} - virtual bool runOnFunction(Function &F); - virtual const char* getPassName() const { return "ModuloScheduling"; } - - // getAnalysisUsage - virtual void getAnalysisUsage(AnalysisUsage &AU) const { - /// HACK: We don't actually need loopinfo or scev, but we have - /// to say we do so that the pass manager does not delete it - /// before we run. - AU.addRequired<LoopInfo>(); - AU.addRequired<ScalarEvolution>(); - - AU.addRequired<DependenceAnalyzer>(); - } - - }; - -} - - -#endif diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp b/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp deleted file mode 100644 index 8b3185155e1..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp +++ /dev/null @@ -1,3155 +0,0 @@ -//===-- ModuloSchedulingSuperBlock.cpp - ModuloScheduling--------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This ModuloScheduling pass is based on the Swing Modulo Scheduling -// algorithm, but has been extended to support SuperBlocks (multiple -// basic block, single entry, multipl exit loops). -// -//===----------------------------------------------------------------------===// - -#define DEBUG_TYPE "ModuloSchedSB" - -#include "DependenceAnalyzer.h" -#include "ModuloSchedulingSuperBlock.h" -#include "llvm/Constants.h" -#include "llvm/ADT/Statistic.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/Passes.h" -#include "llvm/Support/CFG.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/GraphWriter.h" -#include "llvm/Support/Timer.h" -#include "llvm/ADT/StringExtras.h" -#include "llvm/ADT/SCCIterator.h" -#include "llvm/Instructions.h" -#include "../MachineCodeForInstruction.h" -#include "../SparcV9RegisterInfo.h" -#include "../SparcV9Internals.h" -#include "../SparcV9TmpInstr.h" -#include <fstream> -#include <sstream> -#include <cmath> -#include <utility> - -using namespace llvm; -/// Create ModuloSchedulingSBPass -/// -FunctionPass *llvm::createModuloSchedulingSBPass(TargetMachine & targ) { - DEBUG(std::cerr << "Created ModuloSchedulingSBPass\n"); - return new ModuloSchedulingSBPass(targ); -} - - -#if 1 -#define TIME_REGION(VARNAME, DESC) \ - NamedRegionTimer VARNAME(DESC) -#else -#define TIME_REGION(VARNAME, DESC) -#endif - - -//Graph Traits for printing out the dependence graph -template<typename GraphType> -static void WriteGraphToFileSB(std::ostream &O, const std::string &GraphName, - const GraphType >) { - std::string Filename = GraphName + ".dot"; - O << "Writing '" << Filename << "'..."; - std::ofstream F(Filename.c_str()); - - if (F.good()) - WriteGraph(F, GT); - else - O << " error opening file for writing!"; - O << "\n"; -}; - -namespace llvm { - Statistic<> NumLoops("moduloschedSB-numLoops", "Total Number of Loops"); - Statistic<> NumSB("moduloschedSB-numSuperBlocks", "Total Number of SuperBlocks"); - Statistic<> BBWithCalls("modulosched-BBCalls", "Basic Blocks rejected due to calls"); - Statistic<> BBWithCondMov("modulosched-loopCondMov", - "Basic Blocks rejected due to conditional moves"); - Statistic<> SBResourceConstraint("modulosched-resourceConstraint", - "Loops constrained by resources"); - Statistic<> SBRecurrenceConstraint("modulosched-recurrenceConstraint", - "Loops constrained by recurrences"); - Statistic<> SBFinalIISum("modulosched-finalIISum", "Sum of all final II"); - Statistic<> SBIISum("modulosched-IISum", "Sum of all theoretical II"); - Statistic<> SBMSLoops("modulosched-schedLoops", "Number of loops successfully modulo-scheduled"); - Statistic<> SBNoSched("modulosched-noSched", "No schedule"); - Statistic<> SBSameStage("modulosched-sameStage", "Max stage is 0"); - Statistic<> SBBLoops("modulosched-SBBLoops", "Number single basic block loops"); - Statistic<> SBInvalid("modulosched-SBInvalid", "Number invalid superblock loops"); - Statistic<> SBValid("modulosched-SBValid", "Number valid superblock loops"); - Statistic<> SBSize("modulosched-SBSize", "Total size of all valid superblocks"); - - template<> - struct DOTGraphTraits<MSchedGraphSB*> : public DefaultDOTGraphTraits { - static std::string getGraphName(MSchedGraphSB *F) { - return "Dependence Graph"; - } - - static std::string getNodeLabel(MSchedGraphSBNode *Node, MSchedGraphSB *Graph) { - if(!Node->isPredicate()) { - if (Node->getInst()) { - std::stringstream ss; - ss << *(Node->getInst()); - return ss.str(); //((MachineInstr*)Node->getInst()); - } - else - return "No Inst"; - } - else - return "Pred Node"; - } - static std::string getEdgeSourceLabel(MSchedGraphSBNode *Node, - MSchedGraphSBNode::succ_iterator I) { - //Label each edge with the type of dependence - std::string edgelabel = ""; - switch (I.getEdge().getDepOrderType()) { - - case MSchedGraphSBEdge::TrueDep: - edgelabel = "True"; - break; - - case MSchedGraphSBEdge::AntiDep: - edgelabel = "Anti"; - break; - - case MSchedGraphSBEdge::OutputDep: - edgelabel = "Output"; - break; - - case MSchedGraphSBEdge::NonDataDep: - edgelabel = "Pred"; - break; - - default: - edgelabel = "Unknown"; - break; - } - - //FIXME - int iteDiff = I.getEdge().getIteDiff(); - std::string intStr = "(IteDiff: "; - intStr += itostr(iteDiff); - - intStr += ")"; - edgelabel += intStr; - - return edgelabel; - } - }; - - bool ModuloSchedulingSBPass::runOnFunction(Function &F) { - bool Changed = false; - - //Get MachineFunction - MachineFunction &MF = MachineFunction::get(&F); - - //Get Loop Info & Dependence Anaysis info - LoopInfo &LI = getAnalysis<LoopInfo>(); - DependenceAnalyzer &DA = getAnalysis<DependenceAnalyzer>(); - - //Worklist of superblocks - std::vector<std::vector<const MachineBasicBlock*> > Worklist; - FindSuperBlocks(F, LI, Worklist); - - DEBUG(if(Worklist.size() == 0) std::cerr << "No superblocks in function to ModuloSchedule\n"); - - //Loop over worklist and ModuloSchedule each SuperBlock - for(std::vector<std::vector<const MachineBasicBlock*> >::iterator SB = Worklist.begin(), - SBE = Worklist.end(); SB != SBE; ++SB) { - - //Print out Superblock - DEBUG(std::cerr << "ModuloScheduling SB: \n"; - for(std::vector<const MachineBasicBlock*>::const_iterator BI = SB->begin(), - BE = SB->end(); BI != BE; ++BI) { - (*BI)->print(std::cerr);}); - - if(!CreateDefMap(*SB)) { - defaultInst = 0; - defMap.clear(); - continue; - } - - MSchedGraphSB *MSG = new MSchedGraphSB(*SB, target, indVarInstrs[*SB], DA, - machineTollvm[*SB]); - - //Write Graph out to file - DEBUG(WriteGraphToFileSB(std::cerr, F.getName(), MSG)); - - //Calculate Resource II - int ResMII = calculateResMII(*SB); - - //Calculate Recurrence II - int RecMII = calculateRecMII(MSG, ResMII); - - DEBUG(std::cerr << "Number of reccurrences found: " << recurrenceList.size() << "\n"); - - //Our starting initiation interval is the maximum of RecMII and ResMII - if(RecMII < ResMII) - ++SBRecurrenceConstraint; - else - ++SBResourceConstraint; - - II = std::max(RecMII, ResMII); - int mII = II; - - - //Print out II, RecMII, and ResMII - DEBUG(std::cerr << "II starts out as " << II << " ( RecMII=" << RecMII << " and ResMII=" << ResMII << ")\n"); - - //Calculate Node Properties - calculateNodeAttributes(MSG, ResMII); - - //Dump node properties if in debug mode - DEBUG(for(std::map<MSchedGraphSBNode*, MSNodeSBAttributes>::iterator I = nodeToAttributesMap.begin(), - E = nodeToAttributesMap.end(); I !=E; ++I) { - std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: " - << I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth - << " Height: " << I->second.height << "\n"; - }); - - - //Put nodes in order to schedule them - computePartialOrder(); - - //Dump out partial order - DEBUG(for(std::vector<std::set<MSchedGraphSBNode*> >::iterator I = partialOrder.begin(), - E = partialOrder.end(); I !=E; ++I) { - std::cerr << "Start set in PO\n"; - for(std::set<MSchedGraphSBNode*>::iterator J = I->begin(), JE = I->end(); J != JE; ++J) - std::cerr << "PO:" << **J << "\n"; - }); - - //Place nodes in final order - orderNodes(); - - //Dump out order of nodes - DEBUG(for(std::vector<MSchedGraphSBNode*>::iterator I = FinalNodeOrder.begin(), E = FinalNodeOrder.end(); I != E; ++I) { - std::cerr << "FO:" << **I << "\n"; - }); - - - //Finally schedule nodes - bool haveSched = computeSchedule(*SB, MSG); - - //Print out final schedule - DEBUG(schedule.print(std::cerr)); - - //Final scheduling step is to reconstruct the loop only if we actual have - //stage > 0 - if(haveSched) { - //schedule.printSchedule(std::cerr); - reconstructLoop(*SB); - ++SBMSLoops; - //Changed = true; - SBIISum += mII; - SBFinalIISum += II; - - if(schedule.getMaxStage() == 0) - ++SBSameStage; - } - else - ++SBNoSched; - - //Clear out our maps for the next basic block that is processed - nodeToAttributesMap.clear(); - partialOrder.clear(); - recurrenceList.clear(); - FinalNodeOrder.clear(); - schedule.clear(); - defMap.clear(); - - } - return Changed; - } - - void ModuloSchedulingSBPass::FindSuperBlocks(Function &F, LoopInfo &LI, - std::vector<std::vector<const MachineBasicBlock*> > &Worklist) { - - //Get MachineFunction - MachineFunction &MF = MachineFunction::get(&F); - - //Map of LLVM BB to machine BB - std::map<BasicBlock*, MachineBasicBlock*> bbMap; - - for (MachineFunction::iterator BI = MF.begin(); BI != MF.end(); ++BI) { - BasicBlock *llvmBB = (BasicBlock*) BI->getBasicBlock(); - assert(!bbMap.count(llvmBB) && "LLVM BB already in map!"); - bbMap[llvmBB] = &*BI; - } - - //Iterate over the loops, and find super blocks - for(LoopInfo::iterator LB = LI.begin(), LE = LI.end(); LB != LE; ++LB) { - Loop *L = *LB; - ++NumLoops; - - //If loop is not single entry, try the next one - if(!L->getLoopPreheader()) - continue; - - //Check size of this loop, we don't want SBB loops - if(L->getBlocks().size() == 1) - continue; - - //Check if this loop contains no sub loops - if(L->getSubLoops().size() == 0) { - - std::vector<const MachineBasicBlock*> superBlock; - - //Get Loop Headers - BasicBlock *header = L->getHeader(); - - //Follow the header and make sure each BB only has one entry and is valid - BasicBlock *current = header; - assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB\n"); - MachineBasicBlock *currentMBB = bbMap[header]; - bool done = false; - bool success = true; - unsigned offset = 0; - std::map<const MachineInstr*, unsigned> indexMap; - - while(!done) { - //Loop over successors of this BB, they should be in the - //loop block and be valid - BasicBlock *next = 0; - for(succ_iterator I = succ_begin(current), E = succ_end(current); - I != E; ++I) { - if(L->contains(*I)) { - if(!next) - next = *I; - else { - done = true; - success = false; - break; - } - } - } - - if(success) { - superBlock.push_back(currentMBB); - if(next == header) - done = true; - else if(!next->getSinglePredecessor()) { - done = true; - success = false; - } - else { - //Check that the next BB only has one entry - current = next; - assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB"); - currentMBB = bbMap[current]; - } - } - } - - - - - - if(success) { - ++NumSB; - - //Loop over all the blocks in the superblock - for(std::vector<const MachineBasicBlock*>::iterator currentMBB = superBlock.begin(), MBBEnd = superBlock.end(); currentMBB != MBBEnd; ++currentMBB) { - if(!MachineBBisValid(*currentMBB, indexMap, offset)) { - success = false; - break; - } - } - } - - if(success) { - if(getIndVar(superBlock, bbMap, indexMap)) { - ++SBValid; - Worklist.push_back(superBlock); - SBSize += superBlock.size(); - } - else - ++SBInvalid; - } - } - } - } - - - bool ModuloSchedulingSBPass::getIndVar(std::vector<const MachineBasicBlock*> &superBlock, std::map<BasicBlock*, MachineBasicBlock*> &bbMap, - std::map<const MachineInstr*, unsigned> &indexMap) { - //See if we can get induction var instructions - std::set<const BasicBlock*> llvmSuperBlock; - - for(unsigned i =0; i < superBlock.size(); ++i) - llvmSuperBlock.insert(superBlock[i]->getBasicBlock()); - - //Get Target machine instruction info - const TargetInstrInfo *TMI = target.getInstrInfo(); - - //Get the loop back branch - BranchInst *b = dyn_cast<BranchInst>(((BasicBlock*) (superBlock[superBlock.size()-1])->getBasicBlock())->getTerminator()); - std::set<Instruction*> indVar; - - if(b->isConditional()) { - //Get the condition for the branch - Value *cond = b->getCondition(); - - DEBUG(std::cerr << "Condition: " << *cond << "\n"); - - //List of instructions associated with induction variable - std::vector<Instruction*> stack; - - //Add branch - indVar.insert(b); - - if(Instruction *I = dyn_cast<Instruction>(cond)) - if(bbMap.count(I->getParent())) { - if (!assocIndVar(I, indVar, stack, bbMap, superBlock[(superBlock.size()-1)]->getBasicBlock(), llvmSuperBlock)) - return false; - } - else - return false; - else - return false; - } - else { - indVar.insert(b); - } - - //Dump out instructions associate with indvar for debug reasons - DEBUG(for(std::set<Instruction*>::iterator N = indVar.begin(), NE = indVar.end(); - N != NE; ++N) { - std::cerr << **N << "\n"; - }); - - //Create map of machine instr to llvm instr - std::map<MachineInstr*, Instruction*> mllvm; - for(std::vector<const MachineBasicBlock*>::iterator MBB = superBlock.begin(), MBE = superBlock.end(); MBB != MBE; ++MBB) { - BasicBlock *BB = (BasicBlock*) (*MBB)->getBasicBlock(); - for(BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) { - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(I); - for (unsigned j = 0; j < tempMvec.size(); j++) { - mllvm[tempMvec[j]] = I; - } - } - } - - //Convert list of LLVM Instructions to list of Machine instructions - std::map<const MachineInstr*, unsigned> mIndVar; - for(std::set<Instruction*>::iterator N = indVar.begin(), - NE = indVar.end(); N != NE; ++N) { - - //If we have a load, we can't handle this loop because - //there is no way to preserve dependences between loads - //and stores - if(isa<LoadInst>(*N)) - return false; - - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(*N); - for (unsigned j = 0; j < tempMvec.size(); j++) { - MachineOpCode OC = (tempMvec[j])->getOpcode(); - if(TMI->isNop(OC)) - continue; - if(!indexMap.count(tempMvec[j])) - continue; - mIndVar[(MachineInstr*) tempMvec[j]] = indexMap[(MachineInstr*) tempMvec[j]]; - DEBUG(std::cerr << *(tempMvec[j]) << " at index " << indexMap[(MachineInstr*) tempMvec[j]] << "\n"); - } - } - - //Put into a map for future access - indVarInstrs[superBlock] = mIndVar; - machineTollvm[superBlock] = mllvm; - - return true; - - } - - bool ModuloSchedulingSBPass::assocIndVar(Instruction *I, - std::set<Instruction*> &indVar, - std::vector<Instruction*> &stack, - std::map<BasicBlock*, MachineBasicBlock*> &bbMap, - const BasicBlock *last, std::set<const BasicBlock*> &llvmSuperBlock) { - - stack.push_back(I); - - //If this is a phi node, check if its the canonical indvar - if(PHINode *PN = dyn_cast<PHINode>(I)) { - if(llvmSuperBlock.count(PN->getParent())) { - if (Instruction *Inc = - dyn_cast<Instruction>(PN->getIncomingValueForBlock(last))) - if (Inc->getOpcode() == Instruction::Add && Inc->getOperand(0) == PN) - if (ConstantInt *CI = dyn_cast<ConstantInt>(Inc->getOperand(1))) - if (CI->equalsInt(1)) { - //We have found the indvar, so add the stack, and inc instruction to the set - indVar.insert(stack.begin(), stack.end()); - indVar.insert(Inc); - stack.pop_back(); - return true; - } - return false; - } - } - else { - //Loop over each of the instructions operands, check if they are an instruction and in this BB - for(unsigned i = 0; i < I->getNumOperands(); ++i) { - if(Instruction *N = dyn_cast<Instruction>(I->getOperand(i))) { - if(bbMap.count(N->getParent())) - if(!assocIndVar(N, indVar, stack, bbMap, last, llvmSuperBlock)) - return false; - } - } - } - - stack.pop_back(); - return true; - } - - - /// This function checks if a Machine Basic Block is valid for modulo - /// scheduling. This means that it has no control flow (if/else or - /// calls) in the block. Currently ModuloScheduling only works on - /// single basic block loops. - bool ModuloSchedulingSBPass::MachineBBisValid(const MachineBasicBlock *BI, - std::map<const MachineInstr*, unsigned> &indexMap, - unsigned &offset) { - - //Check size of our basic block.. make sure we have more then just the terminator in it - if(BI->getBasicBlock()->size() == 1) - return false; - - //Get Target machine instruction info - const TargetInstrInfo *TMI = target.getInstrInfo(); - - unsigned count = 0; - for(MachineBasicBlock::const_iterator I = BI->begin(), E = BI->end(); I != E; ++I) { - //Get opcode to check instruction type - MachineOpCode OC = I->getOpcode(); - - //Look for calls - if(TMI->isCall(OC)) { - ++BBWithCalls; - return false; - } - - //Look for conditional move - if(OC == V9::MOVRZr || OC == V9::MOVRZi || OC == V9::MOVRLEZr || OC == V9::MOVRLEZi - || OC == V9::MOVRLZr || OC == V9::MOVRLZi || OC == V9::MOVRNZr || OC == V9::MOVRNZi - || OC == V9::MOVRGZr || OC == V9::MOVRGZi || OC == V9::MOVRGEZr - || OC == V9::MOVRGEZi || OC == V9::MOVLEr || OC == V9::MOVLEi || OC == V9::MOVLEUr - || OC == V9::MOVLEUi || OC == V9::MOVFLEr || OC == V9::MOVFLEi - || OC == V9::MOVNEr || OC == V9::MOVNEi || OC == V9::MOVNEGr || OC == V9::MOVNEGi - || OC == V9::MOVFNEr || OC == V9::MOVFNEi) { - ++BBWithCondMov; - return false; - } - - indexMap[I] = count + offset; - - if(TMI->isNop(OC)) - continue; - - ++count; - } - - offset += count; - - return true; - } -} - -bool ModuloSchedulingSBPass::CreateDefMap(std::vector<const MachineBasicBlock*> &SB) { - defaultInst = 0; - - for(std::vector<const MachineBasicBlock*>::iterator BI = SB.begin(), - BE = SB.end(); BI != BE; ++BI) { - - for(MachineBasicBlock::const_iterator I = (*BI)->begin(), E = (*BI)->end(); I != E; ++I) { - for(unsigned opNum = 0; opNum < I->getNumOperands(); ++opNum) { - const MachineOperand &mOp = I->getOperand(opNum); - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { - Value *V = mOp.getVRegValue(); - //assert if this is the second def we have seen - if(defMap.count(V) && isa<PHINode>(V)) - DEBUG(std::cerr << "FIXME: Dup def for phi!\n"); - else { - //assert(!defMap.count(V) && "Def already in the map"); - if(defMap.count(V)) - return false; - defMap[V] = (MachineInstr*) &*I; - } - } - - //See if we can use this Value* as our defaultInst - if(!defaultInst && mOp.getType() == MachineOperand::MO_VirtualRegister) { - Value *V = mOp.getVRegValue(); - if(!isa<TmpInstruction>(V) && !isa<Argument>(V) && !isa<Constant>(V) && !isa<PHINode>(V)) - defaultInst = (Instruction*) V; - } - } - } - } - - if(!defaultInst) - return false; - - return true; - -} - - -//ResMII is calculated by determining the usage count for each resource -//and using the maximum. -//FIXME: In future there should be a way to get alternative resources -//for each instruction -int ModuloSchedulingSBPass::calculateResMII(std::vector<const MachineBasicBlock*> &superBlock) { - - TIME_REGION(X, "calculateResMII"); - - const TargetInstrInfo *mii = target.getInstrInfo(); - const TargetSchedInfo *msi = target.getSchedInfo(); - - int ResMII = 0; - - //Map to keep track of usage count of each resource - std::map<unsigned, unsigned> resourceUsageCount; - - for(std::vector<const MachineBasicBlock*>::iterator BI = superBlock.begin(), BE = superBlock.end(); BI != BE; ++BI) { - for(MachineBasicBlock::const_iterator I = (*BI)->begin(), E = (*BI)->end(); I != E; ++I) { - - //Get resource usage for this instruction - InstrRUsage rUsage = msi->getInstrRUsage(I->getOpcode()); - std::vector<std::vector<resourceId_t> > resources = rUsage.resourcesByCycle; - - //Loop over resources in each cycle and increments their usage count - for(unsigned i=0; i < resources.size(); ++i) - for(unsigned j=0; j < resources[i].size(); ++j) { - if(!resourceUsageCount.count(resources[i][j])) { - resourceUsageCount[resources[i][j]] = 1; - } - else { - resourceUsageCount[resources[i][j]] = resourceUsageCount[resources[i][j]] + 1; - } - } - } - } - - //Find maximum usage count - - //Get max number of instructions that can be issued at once. (FIXME) - int issueSlots = msi->maxNumIssueTotal; - - for(std::map<unsigned,unsigned>::iterator RB = resourceUsageCount.begin(), RE = resourceUsageCount.end(); RB != RE; ++RB) { - - //Get the total number of the resources in our cpu - int resourceNum = CPUResource::getCPUResource(RB->first)->maxNumUsers; - - //Get total usage count for this resources - unsigned usageCount = RB->second; - - //Divide the usage count by either the max number we can issue or the number of - //resources (whichever is its upper bound) - double finalUsageCount; - DEBUG(std::cerr << "Resource Num: " << RB->first << " Usage: " << usageCount << " TotalNum: " << resourceNum << "\n"); - - if( resourceNum <= issueSlots) - finalUsageCount = ceil(1.0 * usageCount / resourceNum); - else - finalUsageCount = ceil(1.0 * usageCount / issueSlots); - - - //Only keep track of the max - ResMII = std::max( (int) finalUsageCount, ResMII); - - } - - return ResMII; - -} - -/// calculateRecMII - Calculates the value of the highest recurrence -/// By value we mean the total latency/distance -int ModuloSchedulingSBPass::calculateRecMII(MSchedGraphSB *graph, int MII) { - - TIME_REGION(X, "calculateRecMII"); - - findAllCircuits(graph, MII); - int RecMII = 0; - - for(std::set<std::pair<int, std::vector<MSchedGraphSBNode*> > >::iterator I = recurrenceList.begin(), E=recurrenceList.end(); I !=E; ++I) { - RecMII = std::max(RecMII, I->first); - } - - return MII; -} - -int CircCountSB; - -void ModuloSchedulingSBPass::unblock(MSchedGraphSBNode *u, std::set<MSchedGraphSBNode*> &blocked, - std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > &B) { - - //Unblock u - DEBUG(std::cerr << "Unblocking: " << *u << "\n"); - blocked.erase(u); - - //std::set<MSchedGraphSBNode*> toErase; - while (!B[u].empty()) { - MSchedGraphSBNode *W = *B[u].begin(); - B[u].erase(W); - //toErase.insert(*W); - DEBUG(std::cerr << "Removed: " << *W << "from B-List\n"); - if(blocked.count(W)) - unblock(W, blocked, B); - } - -} - -void ModuloSchedulingSBPass::addSCC(std::vector<MSchedGraphSBNode*> &SCC, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes) { - - int totalDelay = 0; - int totalDistance = 0; - std::vector<MSchedGraphSBNode*> recc; - MSchedGraphSBNode *start = 0; - MSchedGraphSBNode *end = 0; - - //Loop over recurrence, get delay and distance - for(std::vector<MSchedGraphSBNode*>::iterator N = SCC.begin(), NE = SCC.end(); N != NE; ++N) { - DEBUG(std::cerr << **N << "\n"); - totalDelay += (*N)->getLatency(); - - for(unsigned i = 0; i < (*N)->succ_size(); ++i) { - MSchedGraphSBEdge *edge = (*N)->getSuccessor(i); - if(find(SCC.begin(), SCC.end(), edge->getDest()) != SCC.end()) { - totalDistance += edge->getIteDiff(); - if(edge->getIteDiff() > 0) - if(!start && !end) { - start = *N; - end = edge->getDest(); - } - - } - } - - - //Get the original node - recc.push_back(newNodes[*N]); - - - } - - DEBUG(std::cerr << "End Recc\n"); - - - assert( (start && end) && "Must have start and end node to ignore edge for SCC"); - - if(start && end) { - //Insert reccurrence into the list - DEBUG(std::cerr << "Ignore Edge from!!: " << *start << " to " << *end << "\n"); - edgesToIgnore.insert(std::make_pair(newNodes[start], (newNodes[end])->getInEdgeNum(newNodes[start]))); - } - - int lastII = totalDelay / totalDistance; - - - recurrenceList.insert(std::make_pair(lastII, recc)); - -} - -bool ModuloSchedulingSBPass::circuit(MSchedGraphSBNode *v, std::vector<MSchedGraphSBNode*> &stack, - std::set<MSchedGraphSBNode*> &blocked, std::vector<MSchedGraphSBNode*> &SCC, - MSchedGraphSBNode *s, std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > &B, - int II, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes) { - bool f = false; - - DEBUG(std::cerr << "Finding Circuits Starting with: ( " << v << ")"<< *v << "\n"); - - //Push node onto the stack - stack.push_back(v); - - //block this node - blocked.insert(v); - - //Loop over all successors of node v that are in the scc, create Adjaceny list - std::set<MSchedGraphSBNode*> AkV; - for(MSchedGraphSBNode::succ_iterator I = v->succ_begin(), E = v->succ_end(); I != E; ++I) { - if((std::find(SCC.begin(), SCC.end(), *I) != SCC.end())) { - AkV.insert(*I); - } - } - - for(std::set<MSchedGraphSBNode*>::iterator I = AkV.begin(), E = AkV.end(); I != E; ++I) { - if(*I == s) { - //We have a circuit, so add it to our list - addRecc(stack, newNodes); - f = true; - } - else if(!blocked.count(*I)) { - if(circuit(*I, stack, blocked, SCC, s, B, II, newNodes)) - f = true; - } - else - DEBUG(std::cerr << "Blocked: " << **I << "\n"); - } - - - if(f) { - unblock(v, blocked, B); - } - else { - for(std::set<MSchedGraphSBNode*>::iterator I = AkV.begin(), E = AkV.end(); I != E; ++I) - B[*I].insert(v); - - } - - //Pop v - stack.pop_back(); - - return f; - -} - -void ModuloSchedulingSBPass::addRecc(std::vector<MSchedGraphSBNode*> &stack, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes) { - std::vector<MSchedGraphSBNode*> recc; - //Dump recurrence for now - DEBUG(std::cerr << "Starting Recc\n"); - - int totalDelay = 0; - int totalDistance = 0; - MSchedGraphSBNode *lastN = 0; - MSchedGraphSBNode *start = 0; - MSchedGraphSBNode *end = 0; - - //Loop over recurrence, get delay and distance - for(std::vector<MSchedGraphSBNode*>::iterator N = stack.begin(), NE = stack.end(); N != NE; ++N) { - DEBUG(std::cerr << **N << "\n"); - totalDelay += (*N)->getLatency(); - if(lastN) { - int iteDiff = (*N)->getInEdge(lastN).getIteDiff(); - totalDistance += iteDiff; - - if(iteDiff > 0) { - start = lastN; - end = *N; - } - } - //Get the original node - lastN = *N; - recc.push_back(newNodes[*N]); - - - } - - //Get the loop edge - totalDistance += lastN->getIteDiff(*stack.begin()); - - DEBUG(std::cerr << "End Recc\n"); - CircCountSB++; - - if(start && end) { - //Insert reccurrence into the list - DEBUG(std::cerr << "Ignore Edge from!!: " << *start << " to " << *end << "\n"); - edgesToIgnore.insert(std::make_pair(newNodes[start], (newNodes[end])->getInEdgeNum(newNodes[start]))); - } - else { - //Insert reccurrence into the list - DEBUG(std::cerr << "Ignore Edge from: " << *lastN << " to " << **stack.begin() << "\n"); - edgesToIgnore.insert(std::make_pair(newNodes[lastN], newNodes[(*stack.begin())]->getInEdgeNum(newNodes[lastN]))); - - } - //Adjust II until we get close to the inequality delay - II*distance <= 0 - int RecMII = II; //Starting value - int value = totalDelay-(RecMII * totalDistance); - int lastII = II; - while(value < 0) { - - lastII = RecMII; - RecMII--; - value = totalDelay-(RecMII * totalDistance); - } - - recurrenceList.insert(std::make_pair(lastII, recc)); - -} - - -void ModuloSchedulingSBPass::findAllCircuits(MSchedGraphSB *g, int II) { - - CircCountSB = 0; - - //Keep old to new node mapping information - std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> newNodes; - - //copy the graph - MSchedGraphSB *MSG = new MSchedGraphSB(*g, newNodes); - - DEBUG(std::cerr << "Finding All Circuits\n"); - - //Set of blocked nodes - std::set<MSchedGraphSBNode*> blocked; - - //Stack holding current circuit - std::vector<MSchedGraphSBNode*> stack; - - //Map for B Lists - std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > B; - - //current node - MSchedGraphSBNode *s; - - - //Iterate over the graph until its down to one node or empty - while(MSG->size() > 1) { - - //Write Graph out to file - //WriteGraphToFile(std::cerr, "Graph" + utostr(MSG->size()), MSG); - - DEBUG(std::cerr << "Graph Size: " << MSG->size() << "\n"); - DEBUG(std::cerr << "Finding strong component Vk with least vertex\n"); - - //Iterate over all the SCCs in the graph - std::set<MSchedGraphSBNode*> Visited; - std::vector<MSchedGraphSBNode*> Vk; - MSchedGraphSBNode* s = 0; - int numEdges = 0; - - //Find scc with the least vertex - for (MSchedGraphSB::iterator GI = MSG->begin(), E = MSG->end(); GI != E; ++GI) - if (Visited.insert(GI->second).second) { - for (scc_iterator<MSchedGraphSBNode*> SCCI = scc_begin(GI->second), - E = scc_end(GI->second); SCCI != E; ++SCCI) { - std::vector<MSchedGraphSBNode*> &nextSCC = *SCCI; - - if (Visited.insert(nextSCC[0]).second) { - Visited.insert(nextSCC.begin()+1, nextSCC.end()); - - if(nextSCC.size() > 1) { - DEBUG(std::cerr << "SCC size: " << nextSCC.size() << "\n"); - - for(unsigned i = 0; i < nextSCC.size(); ++i) { - //Loop over successor and see if in scc, then count edge - MSchedGraphSBNode *node = nextSCC[i]; - for(MSchedGraphSBNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; ++S) { - if(find(nextSCC.begin(), nextSCC.end(), *S) != nextSCC.end()) - numEdges++; - } - } - DEBUG(std::cerr << "Num Edges: " << numEdges << "\n"); - } - - //Ignore self loops - if(nextSCC.size() > 1) { - - //Get least vertex in Vk - if(!s) { - s = nextSCC[0]; - Vk = nextSCC; - } - - for(unsigned i = 0; i < nextSCC.size(); ++i) { - if(nextSCC[i] < s) { - s = nextSCC[i]; - Vk = nextSCC; - } - } - } - } - } - } - - - - //Process SCC - DEBUG(for(std::vector<MSchedGraphSBNode*>::iterator N = Vk.begin(), NE = Vk.end(); - N != NE; ++N) { std::cerr << *((*N)->getInst()); }); - - //Iterate over all nodes in this scc - for(std::vector<MSchedGraphSBNode*>::iterator N = Vk.begin(), NE = Vk.end(); - N != NE; ++N) { - blocked.erase(*N); - B[*N].clear(); - } - if(Vk.size() > 1) { - if(numEdges < 98) - circuit(s, stack, blocked, Vk, s, B, II, newNodes); - else - addSCC(Vk, newNodes); - - - //Delete nodes from the graph - //Find all nodes up to s and delete them - std::vector<MSchedGraphSBNode*> nodesToRemove; - nodesToRemove.push_back(s); - for(MSchedGraphSB::iterator N = MSG->begin(), NE = MSG->end(); N != NE; ++N) { - if(N->second < s ) - nodesToRemove.push_back(N->second); - } - for(std::vector<MSchedGraphSBNode*>::iterator N = nodesToRemove.begin(), NE = nodesToRemove.end(); N != NE; ++N) { - DEBUG(std::cerr << "Deleting Node: " << **N << "\n"); - MSG->deleteNode(*N); - } - } - else - break; - } - DEBUG(std::cerr << "Num Circuits found: " << CircCountSB << "\n"); -} -/// calculateNodeAttributes - The following properties are calculated for -/// each node in the dependence graph: ASAP, ALAP, Depth, Height, and -/// MOB. -void ModuloSchedulingSBPass::calculateNodeAttributes(MSchedGraphSB *graph, int MII) { - - TIME_REGION(X, "calculateNodeAttributes"); - - assert(nodeToAttributesMap.empty() && "Node attribute map was not cleared"); - - //Loop over the nodes and add them to the map - for(MSchedGraphSB::iterator I = graph->begin(), E = graph->end(); I != E; ++I) { - - DEBUG(std::cerr << "Inserting node into attribute map: " << *I->second << "\n"); - - //Assert if its already in the map - assert(nodeToAttributesMap.count(I->second) == 0 && - "Node attributes are already in the map"); - - //Put into the map with default attribute values - nodeToAttributesMap[I->second] = MSNodeSBAttributes(); - } - - //Create set to deal with reccurrences - std::set<MSchedGraphSBNode*> visitedNodes; - - //Now Loop over map and calculate the node attributes - for(std::map<MSchedGraphSBNode*, MSNodeSBAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { - calculateASAP(I->first, MII, (MSchedGraphSBNode*) 0); - visitedNodes.clear(); - } - - int maxASAP = findMaxASAP(); - //Calculate ALAP which depends on ASAP being totally calculated - for(std::map<MSchedGraphSBNode*, MSNodeSBAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { - calculateALAP(I->first, MII, maxASAP, (MSchedGraphSBNode*) 0); - visitedNodes.clear(); - } - - //Calculate MOB which depends on ASAP being totally calculated, also do depth and height - for(std::map<MSchedGraphSBNode*, MSNodeSBAttributes>::iterator I = nodeToAttributesMap.begin(), E = nodeToAttributesMap.end(); I != E; ++I) { - (I->second).MOB = std::max(0,(I->second).ALAP - (I->second).ASAP); - - DEBUG(std::cerr << "MOB: " << (I->second).MOB << " (" << *(I->first) << ")\n"); - calculateDepth(I->first, (MSchedGraphSBNode*) 0); - calculateHeight(I->first, (MSchedGraphSBNode*) 0); - } - - -} - -/// ignoreEdge - Checks to see if this edge of a recurrence should be ignored or not -bool ModuloSchedulingSBPass::ignoreEdge(MSchedGraphSBNode *srcNode, MSchedGraphSBNode *destNode) { - if(destNode == 0 || srcNode ==0) - return false; - - bool findEdge = edgesToIgnore.count(std::make_pair(srcNode, destNode->getInEdgeNum(srcNode))); - - DEBUG(std::cerr << "Ignoring edge? from: " << *srcNode << " to " << *destNode << "\n"); - - return findEdge; -} - - -/// calculateASAP - Calculates the -int ModuloSchedulingSBPass::calculateASAP(MSchedGraphSBNode *node, int MII, MSchedGraphSBNode *destNode) { - - DEBUG(std::cerr << "Calculating ASAP for " << *node << "\n"); - - //Get current node attributes - MSNodeSBAttributes &attributes = nodeToAttributesMap.find(node)->second; - - if(attributes.ASAP != -1) - return attributes.ASAP; - - int maxPredValue = 0; - - //Iterate over all of the predecessors and find max - for(MSchedGraphSBNode::pred_iterator P = node->pred_begin(), E = node->pred_end(); P != E; ++P) { - - //Only process if we are not ignoring the edge - if(!ignoreEdge(*P, node)) { - int predASAP = -1; - predASAP = calculateASAP(*P, MII, node); - - assert(predASAP != -1 && "ASAP has not been calculated"); - int iteDiff = node->getInEdge(*P).getIteDiff(); - - int currentPredValue = predASAP + (*P)->getLatency() - (iteDiff * MII); - DEBUG(std::cerr << "pred ASAP: " << predASAP << ", iteDiff: " << iteDiff << ", PredLatency: " << (*P)->getLatency() << ", Current ASAP pred: " << currentPredValue << "\n"); - maxPredValue = std::max(maxPredValue, currentPredValue); - } - } - - attributes.ASAP = maxPredValue; - - DEBUG(std::cerr << "ASAP: " << attributes.ASAP << " (" << *node << ")\n"); - - return maxPredValue; -} - - -int ModuloSchedulingSBPass::calculateALAP(MSchedGraphSBNode *node, int MII, - int maxASAP, MSchedGraphSBNode *srcNode) { - - DEBUG(std::cerr << "Calculating ALAP for " << *node << "\n"); - - MSNodeSBAttributes &attributes = nodeToAttributesMap.find(node)->second; - - if(attributes.ALAP != -1) - return attributes.ALAP; - - if(node->hasSuccessors()) { - - //Trying to deal with the issue where the node has successors, but - //we are ignoring all of the edges to them. So this is my hack for - //now.. there is probably a more elegant way of doing this (FIXME) - bool processedOneEdge = false; - - //FIXME, set to something high to start - int minSuccValue = 9999999; - - //Iterate over all of the predecessors and fine max - for(MSchedGraphSBNode::succ_iterator P = node->succ_begin(), - E = node->succ_end(); P != E; ++P) { - - //Only process if we are not ignoring the edge - if(!ignoreEdge(node, *P)) { - processedOneEdge = true; - int succALAP = -1; - succALAP = calculateALAP(*P, MII, maxASAP, node); - - assert(succALAP != -1 && "Successors ALAP should have been caclulated"); - - int iteDiff = P.getEdge().getIteDiff(); - - int currentSuccValue = succALAP - node->getLatency() + iteDiff * MII; - - DEBUG(std::cerr << "succ ALAP: " << succALAP << ", iteDiff: " << iteDiff << ", SuccLatency: " << (*P)->getLatency() << ", Current ALAP succ: " << currentSuccValue << "\n"); - - minSuccValue = std::min(minSuccValue, currentSuccValue); - } - } - - if(processedOneEdge) - attributes.ALAP = minSuccValue; - - else - attributes.ALAP = maxASAP; - } - else - attributes.ALAP = maxASAP; - - DEBUG(std::cerr << "ALAP: " << attributes.ALAP << " (" << *node << ")\n"); - - if(attributes.ALAP < 0) - attributes.ALAP = 0; - - return attributes.ALAP; -} - -int ModuloSchedulingSBPass::findMaxASAP() { - int maxASAP = 0; - - for(std::map<MSchedGraphSBNode*, MSNodeSBAttributes>::iterator I = nodeToAttributesMap.begin(), - E = nodeToAttributesMap.end(); I != E; ++I) - maxASAP = std::max(maxASAP, I->second.ASAP); - return maxASAP; -} - - -int ModuloSchedulingSBPass::calculateHeight(MSchedGraphSBNode *node,MSchedGraphSBNode *srcNode) { - - MSNodeSBAttributes &attributes = nodeToAttributesMap.find(node)->second; - - if(attributes.height != -1) - return attributes.height; - - int maxHeight = 0; - - //Iterate over all of the predecessors and find max - for(MSchedGraphSBNode::succ_iterator P = node->succ_begin(), - E = node->succ_end(); P != E; ++P) { - - - if(!ignoreEdge(node, *P)) { - int succHeight = calculateHeight(*P, node); - - assert(succHeight != -1 && "Successors Height should have been caclulated"); - - int currentHeight = succHeight + node->getLatency(); - maxHeight = std::max(maxHeight, currentHeight); - } - } - attributes.height = maxHeight; - DEBUG(std::cerr << "Height: " << attributes.height << " (" << *node << ")\n"); - return maxHeight; -} - - -int ModuloSchedulingSBPass::calculateDepth(MSchedGraphSBNode *node, - MSchedGraphSBNode *destNode) { - - MSNodeSBAttributes &attributes = nodeToAttributesMap.find(node)->second; - - if(attributes.depth != -1) - return attributes.depth; - - int maxDepth = 0; - - //Iterate over all of the predecessors and fine max - for(MSchedGraphSBNode::pred_iterator P = node->pred_begin(), E = node->pred_end(); P != E; ++P) { - - if(!ignoreEdge(*P, node)) { - int predDepth = -1; - predDepth = calculateDepth(*P, node); - - assert(predDepth != -1 && "Predecessors ASAP should have been caclulated"); - - int currentDepth = predDepth + (*P)->getLatency(); - maxDepth = std::max(maxDepth, currentDepth); - } - } - attributes.depth = maxDepth; - - DEBUG(std::cerr << "Depth: " << attributes.depth << " (" << *node << "*)\n"); - return maxDepth; -} - -void ModuloSchedulingSBPass::computePartialOrder() { - - TIME_REGION(X, "calculatePartialOrder"); - - DEBUG(std::cerr << "Computing Partial Order\n"); - - //Steps to add a recurrence to the partial order 1) Find reccurrence - //with the highest RecMII. Add it to the partial order. 2) For each - //recurrence with decreasing RecMII, add it to the partial order - //along with any nodes that connect this recurrence to recurrences - //already in the partial order - for(std::set<std::pair<int, std::vector<MSchedGraphSBNode*> > >::reverse_iterator - I = recurrenceList.rbegin(), E=recurrenceList.rend(); I !=E; ++I) { - - std::set<MSchedGraphSBNode*> new_recurrence; - - //Loop through recurrence and remove any nodes already in the partial order - for(std::vector<MSchedGraphSBNode*>::const_iterator N = I->second.begin(), - NE = I->second.end(); N != NE; ++N) { - - bool found = false; - for(std::vector<std::set<MSchedGraphSBNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - if(PO->count(*N)) - found = true; - } - - //Check if its a branch, and remove to handle special - if(!found) { - new_recurrence.insert(*N); - } - - } - - - if(new_recurrence.size() > 0) { - - std::vector<MSchedGraphSBNode*> path; - std::set<MSchedGraphSBNode*> nodesToAdd; - - //Dump recc we are dealing with (minus nodes already in PO) - DEBUG(std::cerr << "Recc: "); - DEBUG(for(std::set<MSchedGraphSBNode*>::iterator R = new_recurrence.begin(), RE = new_recurrence.end(); R != RE; ++R) { std::cerr << **R ; }); - - //Add nodes that connect this recurrence to recurrences in the partial path - for(std::set<MSchedGraphSBNode*>::iterator N = new_recurrence.begin(), - NE = new_recurrence.end(); N != NE; ++N) - searchPath(*N, path, nodesToAdd, new_recurrence); - - //Add nodes to this recurrence if they are not already in the partial order - for(std::set<MSchedGraphSBNode*>::iterator N = nodesToAdd.begin(), NE = nodesToAdd.end(); - N != NE; ++N) { - bool found = false; - for(std::vector<std::set<MSchedGraphSBNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - if(PO->count(*N)) - found = true; - } - if(!found) { - assert("FOUND CONNECTOR"); - new_recurrence.insert(*N); - } - } - - partialOrder.push_back(new_recurrence); - } - } - - //Add any nodes that are not already in the partial order - //Add them in a set, one set per connected component - std::set<MSchedGraphSBNode*> lastNodes; - std::set<MSchedGraphSBNode*> noPredNodes; - for(std::map<MSchedGraphSBNode*, MSNodeSBAttributes>::iterator I = nodeToAttributesMap.begin(), - E = nodeToAttributesMap.end(); I != E; ++I) { - - bool found = false; - - //Check if its already in our partial order, if not add it to the final vector - for(std::vector<std::set<MSchedGraphSBNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - if(PO->count(I->first)) - found = true; - } - if(!found) - lastNodes.insert(I->first); - } - - //For each node w/out preds, see if there is a path to one of the - //recurrences, and if so add them to that current recc - /*for(std::set<MSchedGraphSBNode*>::iterator N = noPredNodes.begin(), NE = noPredNodes.end(); - N != NE; ++N) { - DEBUG(std::cerr << "No Pred Path from: " << **N << "\n"); - for(std::vector<std::set<MSchedGraphSBNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - std::vector<MSchedGraphSBNode*> path; - pathToRecc(*N, path, *PO, lastNodes); - } - }*/ - - - //Break up remaining nodes that are not in the partial order - ///into their connected compoenents - while(lastNodes.size() > 0) { - std::set<MSchedGraphSBNode*> ccSet; - connectedComponentSet(*(lastNodes.begin()),ccSet, lastNodes); - if(ccSet.size() > 0) - partialOrder.push_back(ccSet); - } - -} - -void ModuloSchedulingSBPass::connectedComponentSet(MSchedGraphSBNode *node, std::set<MSchedGraphSBNode*> &ccSet, std::set<MSchedGraphSBNode*> &lastNodes) { - - //Add to final set - if( !ccSet.count(node) && lastNodes.count(node)) { - lastNodes.erase(node); - ccSet.insert(node); - } - else - return; - - //Loop over successors and recurse if we have not seen this node before - for(MSchedGraphSBNode::succ_iterator node_succ = node->succ_begin(), end=node->succ_end(); node_succ != end; ++node_succ) { - connectedComponentSet(*node_succ, ccSet, lastNodes); - } - -} - -void ModuloSchedulingSBPass::searchPath(MSchedGraphSBNode *node, - std::vector<MSchedGraphSBNode*> &path, - std::set<MSchedGraphSBNode*> &nodesToAdd, - std::set<MSchedGraphSBNode*> &new_reccurrence) { - //Push node onto the path - path.push_back(node); - - //Loop over all successors and see if there is a path from this node to - //a recurrence in the partial order, if so.. add all nodes to be added to recc - for(MSchedGraphSBNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; - ++S) { - - //Check if we should ignore this edge first - if(ignoreEdge(node,*S)) - continue; - - //check if successor is in this recurrence, we will get to it eventually - if(new_reccurrence.count(*S)) - continue; - - //If this node exists in a recurrence already in the partial - //order, then add all nodes in the path to the set of nodes to add - //Check if its already in our partial order, if not add it to the - //final vector - bool found = false; - for(std::vector<std::set<MSchedGraphSBNode*> >::iterator PO = partialOrder.begin(), - PE = partialOrder.end(); PO != PE; ++PO) { - - if(PO->count(*S)) { - found = true; - break; - } - } - - if(!found) { - nodesToAdd.insert(*S); - searchPath(*S, path, nodesToAdd, new_reccurrence); - } - } - - //Pop Node off the path - path.pop_back(); -} - -void dumpIntersection(std::set<MSchedGraphSBNode*> &IntersectCurrent) { - std::cerr << "Intersection ("; - for(std::set<MSchedGraphSBNode*>::iterator I = IntersectCurrent.begin(), E = IntersectCurrent.end(); I != E; ++I) - std::cerr << **I << ", "; - std::cerr << ")\n"; -} - -void ModuloSchedulingSBPass::orderNodes() { - - TIME_REGION(X, "orderNodes"); - - int BOTTOM_UP = 0; - int TOP_DOWN = 1; - - //Set default order - int order = BOTTOM_UP; - - //Loop over and find all pred nodes and schedule them first - /*for(std::vector<std::set<MSchedGraphSBNode*> >::iterator CurrentSet = partialOrder.begin(), E= partialOrder.end(); CurrentSet != E; ++CurrentSet) { - for(std::set<MSchedGraphSBNode*>::iterator N = CurrentSet->begin(), NE = CurrentSet->end(); N != NE; ++N) - if((*N)->isPredicate()) { - FinalNodeOrder.push_back(*N); - CurrentSet->erase(*N); - } - }*/ - - - - //Loop over all the sets and place them in the final node order - for(std::vector<std::set<MSchedGraphSBNode*> >::iterator CurrentSet = partialOrder.begin(), E= partialOrder.end(); CurrentSet != E; ++CurrentSet) { - - DEBUG(std::cerr << "Processing set in S\n"); - DEBUG(dumpIntersection(*CurrentSet)); - - //Result of intersection - std::set<MSchedGraphSBNode*> IntersectCurrent; - - predIntersect(*CurrentSet, IntersectCurrent); - - //If the intersection of predecessor and current set is not empty - //sort nodes bottom up - if(IntersectCurrent.size() != 0) { - DEBUG(std::cerr << "Final Node Order Predecessors and Current Set interesection is NOT empty\n"); - order = BOTTOM_UP; - } - //If empty, use successors - else { - DEBUG(std::cerr << "Final Node Order Predecessors and Current Set interesection is empty\n"); - - succIntersect(*CurrentSet, IntersectCurrent); - - //sort top-down - if(IntersectCurrent.size() != 0) { - DEBUG(std::cerr << "Final Node Order Successors and Current Set interesection is NOT empty\n"); - order = TOP_DOWN; - } - else { - DEBUG(std::cerr << "Final Node Order Successors and Current Set interesection is empty\n"); - //Find node with max ASAP in current Set - MSchedGraphSBNode *node; - int maxASAP = 0; - DEBUG(std::cerr << "Using current set of size " << CurrentSet->size() << "to find max ASAP\n"); - for(std::set<MSchedGraphSBNode*>::iterator J = CurrentSet->begin(), JE = CurrentSet->end(); J != JE; ++J) { - //Get node attributes - MSNodeSBAttributes nodeAttr= nodeToAttributesMap.find(*J)->second; - //assert(nodeAttr != nodeToAttributesMap.end() && "Node not in attributes map!"); - - if(maxASAP <= nodeAttr.ASAP) { - maxASAP = nodeAttr.ASAP; - node = *J; - } - } - assert(node != 0 && "In node ordering node should not be null"); - IntersectCurrent.insert(node); - order = BOTTOM_UP; - } - } - - //Repeat until all nodes are put into the final order from current set - while(IntersectCurrent.size() > 0) { - - if(order == TOP_DOWN) { - DEBUG(std::cerr << "Order is TOP DOWN\n"); - - while(IntersectCurrent.size() > 0) { - DEBUG(std::cerr << "Intersection is not empty, so find heighest height\n"); - - int MOB = 0; - int height = 0; - MSchedGraphSBNode *highestHeightNode = *(IntersectCurrent.begin()); - - //Find node in intersection with highest heigh and lowest MOB - for(std::set<MSchedGraphSBNode*>::iterator I = IntersectCurrent.begin(), - E = IntersectCurrent.end(); I != E; ++I) { - - //Get current nodes properties - MSNodeSBAttributes nodeAttr= nodeToAttributesMap.find(*I)->second; - - if(height < nodeAttr.height) { - highestHeightNode = *I; - height = nodeAttr.height; - MOB = nodeAttr.MOB; - } - else if(height == nodeAttr.height) { - if(MOB > nodeAttr.height) { - highestHeightNode = *I; - height = nodeAttr.height; - MOB = nodeAttr.MOB; - } - } - } - - //Append our node with greatest height to the NodeOrder - if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), highestHeightNode) == FinalNodeOrder.end()) { - DEBUG(std::cerr << "Adding node to Final Order: " << *highestHeightNode << "\n"); - FinalNodeOrder.push_back(highestHeightNode); - } - - //Remove V from IntersectOrder - IntersectCurrent.erase(std::find(IntersectCurrent.begin(), - IntersectCurrent.end(), highestHeightNode)); - - - //Intersect V's successors with CurrentSet - for(MSchedGraphSBNode::succ_iterator P = highestHeightNode->succ_begin(), - E = highestHeightNode->succ_end(); P != E; ++P) { - //if(lower_bound(CurrentSet->begin(), - // CurrentSet->end(), *P) != CurrentSet->end()) { - if(std::find(CurrentSet->begin(), CurrentSet->end(), *P) != CurrentSet->end()) { - if(ignoreEdge(highestHeightNode, *P)) - continue; - //If not already in Intersect, add - if(!IntersectCurrent.count(*P)) - IntersectCurrent.insert(*P); - } - } - } //End while loop over Intersect Size - - //Change direction - order = BOTTOM_UP; - - //Reset Intersect to reflect changes in OrderNodes - IntersectCurrent.clear(); - predIntersect(*CurrentSet, IntersectCurrent); - - } //End If TOP_DOWN - - //Begin if BOTTOM_UP - else { - DEBUG(std::cerr << "Order is BOTTOM UP\n"); - while(IntersectCurrent.size() > 0) { - DEBUG(std::cerr << "Intersection of size " << IntersectCurrent.size() << ", finding highest depth\n"); - - //dump intersection - DEBUG(dumpIntersection(IntersectCurrent)); - //Get node with highest depth, if a tie, use one with lowest - //MOB - int MOB = 0; - int depth = 0; - MSchedGraphSBNode *highestDepthNode = *(IntersectCurrent.begin()); - - for(std::set<MSchedGraphSBNode*>::iterator I = IntersectCurrent.begin(), - E = IntersectCurrent.end(); I != E; ++I) { - //Find node attribute in graph - MSNodeSBAttributes nodeAttr= nodeToAttributesMap.find(*I)->second; - - if(depth < nodeAttr.depth) { - highestDepthNode = *I; - depth = nodeAttr.depth; - MOB = nodeAttr.MOB; - } - else if(depth == nodeAttr.depth) { - if(MOB > nodeAttr.MOB) { - highestDepthNode = *I; - depth = nodeAttr.depth; - MOB = nodeAttr.MOB; - } - } - } - - - - //Append highest depth node to the NodeOrder - if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), highestDepthNode) == FinalNodeOrder.end()) { - DEBUG(std::cerr << "Adding node to Final Order: " << *highestDepthNode << "\n"); - FinalNodeOrder.push_back(highestDepthNode); - } - //Remove heightestDepthNode from IntersectOrder - IntersectCurrent.erase(highestDepthNode); - - - //Intersect heightDepthNode's pred with CurrentSet - for(MSchedGraphSBNode::pred_iterator P = highestDepthNode->pred_begin(), - E = highestDepthNode->pred_end(); P != E; ++P) { - if(CurrentSet->count(*P)) { - if(ignoreEdge(*P, highestDepthNode)) - continue; - - //If not already in Intersect, add - if(!IntersectCurrent.count(*P)) - IntersectCurrent.insert(*P); - } - } - - } //End while loop over Intersect Size - - //Change order - order = TOP_DOWN; - - //Reset IntersectCurrent to reflect changes in OrderNodes - IntersectCurrent.clear(); - succIntersect(*CurrentSet, IntersectCurrent); - } //End if BOTTOM_DOWN - - DEBUG(std::cerr << "Current Intersection Size: " << IntersectCurrent.size() << "\n"); - } - //End Wrapping while loop - DEBUG(std::cerr << "Ending Size of Current Set: " << CurrentSet->size() << "\n"); - }//End for over all sets of nodes - - //FIXME: As the algorithm stands it will NEVER add an instruction such as ba (with no - //data dependencies) to the final order. We add this manually. It will always be - //in the last set of S since its not part of a recurrence - //Loop over all the sets and place them in the final node order - std::vector<std::set<MSchedGraphSBNode*> > ::reverse_iterator LastSet = partialOrder.rbegin(); - for(std::set<MSchedGraphSBNode*>::iterator CurrentNode = LastSet->begin(), LastNode = LastSet->end(); - CurrentNode != LastNode; ++CurrentNode) { - if((*CurrentNode)->getInst()->getOpcode() == V9::BA) - FinalNodeOrder.push_back(*CurrentNode); - } - //Return final Order - //return FinalNodeOrder; -} - - -void ModuloSchedulingSBPass::predIntersect(std::set<MSchedGraphSBNode*> &CurrentSet, std::set<MSchedGraphSBNode*> &IntersectResult) { - - for(unsigned j=0; j < FinalNodeOrder.size(); ++j) { - for(MSchedGraphSBNode::pred_iterator P = FinalNodeOrder[j]->pred_begin(), - E = FinalNodeOrder[j]->pred_end(); P != E; ++P) { - - //Check if we are supposed to ignore this edge or not - if(ignoreEdge(*P,FinalNodeOrder[j])) - continue; - - if(CurrentSet.count(*P)) - if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), *P) == FinalNodeOrder.end()) - IntersectResult.insert(*P); - } - } -} - -void ModuloSchedulingSBPass::succIntersect(std::set<MSchedGraphSBNode*> &CurrentSet, std::set<MSchedGraphSBNode*> &IntersectResult) { - - for(unsigned j=0; j < FinalNodeOrder.size(); ++j) { - for(MSchedGraphSBNode::succ_iterator P = FinalNodeOrder[j]->succ_begin(), - E = FinalNodeOrder[j]->succ_end(); P != E; ++P) { - - //Check if we are supposed to ignore this edge or not - if(ignoreEdge(FinalNodeOrder[j],*P)) - continue; - - if(CurrentSet.count(*P)) - if(std::find(FinalNodeOrder.begin(), FinalNodeOrder.end(), *P) == FinalNodeOrder.end()) - IntersectResult.insert(*P); - } - } -} - - - -bool ModuloSchedulingSBPass::computeSchedule(std::vector<const MachineBasicBlock*> &SB, MSchedGraphSB *MSG) { - - TIME_REGION(X, "computeSchedule"); - - bool success = false; - - //FIXME: Should be set to max II of the original loop - //Cap II in order to prevent infinite loop - int capII = MSG->totalDelay(); - - while(!success) { - - //Keep track of branches, but do not insert into the schedule - std::vector<MSchedGraphSBNode*> branches; - - //Loop over the final node order and process each node - for(std::vector<MSchedGraphSBNode*>::iterator I = FinalNodeOrder.begin(), - E = FinalNodeOrder.end(); I != E; ++I) { - - //CalculateEarly and Late start - bool initialLSVal = false; - bool initialESVal = false; - int EarlyStart = 0; - int LateStart = 0; - bool hasSucc = false; - bool hasPred = false; - bool sched; - - if((*I)->isBranch()) - if((*I)->hasPredecessors()) - sched = true; - else - sched = false; - else - sched = true; - - if(sched) { - //Loop over nodes in the schedule and determine if they are predecessors - //or successors of the node we are trying to schedule - for(MSScheduleSB::schedule_iterator nodesByCycle = schedule.begin(), nodesByCycleEnd = schedule.end(); - nodesByCycle != nodesByCycleEnd; ++nodesByCycle) { - - //For this cycle, get the vector of nodes schedule and loop over it - for(std::vector<MSchedGraphSBNode*>::iterator schedNode = nodesByCycle->second.begin(), SNE = nodesByCycle->second.end(); schedNode != SNE; ++schedNode) { - - if((*I)->isPredecessor(*schedNode)) { - int diff = (*I)->getInEdge(*schedNode).getIteDiff(); - int ES_Temp = nodesByCycle->first + (*schedNode)->getLatency() - diff * II; - DEBUG(std::cerr << "Diff: " << diff << " Cycle: " << nodesByCycle->first << "\n"); - DEBUG(std::cerr << "Temp EarlyStart: " << ES_Temp << " Prev EarlyStart: " << EarlyStart << "\n"); - if(initialESVal) - EarlyStart = std::max(EarlyStart, ES_Temp); - else { - EarlyStart = ES_Temp; - initialESVal = true; - } - hasPred = true; - } - if((*I)->isSuccessor(*schedNode)) { - int diff = (*schedNode)->getInEdge(*I).getIteDiff(); - int LS_Temp = nodesByCycle->first - (*I)->getLatency() + diff * II; - DEBUG(std::cerr << "Diff: " << diff << " Cycle: " << nodesByCycle->first << "\n"); - DEBUG(std::cerr << "Temp LateStart: " << LS_Temp << " Prev LateStart: " << LateStart << "\n"); - if(initialLSVal) - LateStart = std::min(LateStart, LS_Temp); - else { - LateStart = LS_Temp; - initialLSVal = true; - } - hasSucc = true; - } - } - } - } - else { - branches.push_back(*I); - continue; - } - - //Check if the node has no pred or successors and set Early Start to its ASAP - if(!hasSucc && !hasPred) - EarlyStart = nodeToAttributesMap.find(*I)->second.ASAP; - - DEBUG(std::cerr << "Has Successors: " << hasSucc << ", Has Pred: " << hasPred << "\n"); - DEBUG(std::cerr << "EarlyStart: " << EarlyStart << ", LateStart: " << LateStart << "\n"); - - //Now, try to schedule this node depending upon its pred and successor in the schedule - //already - if(!hasSucc && hasPred) - success = scheduleNode(*I, EarlyStart, (EarlyStart + II -1)); - else if(!hasPred && hasSucc) - success = scheduleNode(*I, LateStart, (LateStart - II +1)); - else if(hasPred && hasSucc) { - if(EarlyStart > LateStart) { - success = false; - //LateStart = EarlyStart; - DEBUG(std::cerr << "Early Start can not be later then the late start cycle, schedule fails\n"); - } - else - success = scheduleNode(*I, EarlyStart, std::min(LateStart, (EarlyStart + II -1))); - } - else - success = scheduleNode(*I, EarlyStart, EarlyStart + II - 1); - - if(!success) { - ++II; - schedule.clear(); - break; - } - - } - - if(success) { - DEBUG(std::cerr << "Constructing Schedule Kernel\n"); - success = schedule.constructKernel(II, branches, indVarInstrs[SB]); - DEBUG(std::cerr << "Done Constructing Schedule Kernel\n"); - if(!success) { - ++II; - schedule.clear(); - } - DEBUG(std::cerr << "Final II: " << II << "\n"); - - } - - if(II >= capII) { - DEBUG(std::cerr << "Maximum II reached, giving up\n"); - return false; - } - - assert(II < capII && "The II should not exceed the original loop number of cycles"); - } - return true; -} - - -bool ModuloSchedulingSBPass::scheduleNode(MSchedGraphSBNode *node, - int start, int end) { - bool success = false; - - DEBUG(std::cerr << *node << " (Start Cycle: " << start << ", End Cycle: " << end << ")\n"); - - //Make sure start and end are not negative - //if(start < 0) { - //start = 0; - - //} - //if(end < 0) - //end = 0; - - bool forward = true; - if(start > end) - forward = false; - - bool increaseSC = true; - int cycle = start ; - - - while(increaseSC) { - - increaseSC = false; - - increaseSC = schedule.insert(node, cycle, II); - - if(!increaseSC) - return true; - - //Increment cycle to try again - if(forward) { - ++cycle; - DEBUG(std::cerr << "Increase cycle: " << cycle << "\n"); - if(cycle > end) - return false; - } - else { - --cycle; - DEBUG(std::cerr << "Decrease cycle: " << cycle << "\n"); - if(cycle < end) - return false; - } - } - - return success; -} - -void ModuloSchedulingSBPass::reconstructLoop(std::vector<const MachineBasicBlock*> &SB) { - - TIME_REGION(X, "reconstructLoop"); - - - DEBUG(std::cerr << "Reconstructing Loop\n"); - - //First find the value *'s that we need to "save" - std::map<const Value*, std::pair<const MachineInstr*, int> > valuesToSave; - - //Keep track of instructions we have already seen and their stage because - //we don't want to "save" values if they are used in the kernel immediately - std::map<const MachineInstr*, int> lastInstrs; - - - std::set<MachineBasicBlock*> seenBranchesBB; - const TargetInstrInfo *MTI = target.getInstrInfo(); - std::map<MachineBasicBlock*, std::vector<std::pair<MachineInstr*, int> > > instrsMovedDown; - std::map<MachineBasicBlock*, int> branchStage; - - //Loop over kernel and only look at instructions from a stage > 0 - //Look at its operands and save values *'s that are read - for(MSScheduleSB::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { - - if(I->second !=0) { - //For this instruction, get the Value*'s that it reads and put them into the set. - //Assert if there is an operand of another type that we need to save - const MachineInstr *inst = I->first; - lastInstrs[inst] = I->second; - - for(unsigned i=0; i < inst->getNumOperands(); ++i) { - //get machine operand - const MachineOperand &mOp = inst->getOperand(i); - - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse()) { - //find the value in the map - if (const Value* srcI = mOp.getVRegValue()) { - - if(isa<Constant>(srcI) || isa<Argument>(srcI)) - continue; - - //Before we declare this Value* one that we should save - //make sure its def is not of the same stage as this instruction - //because it will be consumed before its used - Instruction *defInst = (Instruction*) srcI; - - //Should we save this value? - bool save = true; - - //Continue if not in the def map, loop invariant code does not need to be saved - if(!defMap.count(srcI)) - continue; - - MachineInstr *defInstr = defMap[srcI]; - - - if(lastInstrs.count(defInstr)) { - if(lastInstrs[defInstr] == I->second) { - save = false; - - } - } - - if(save) - valuesToSave[srcI] = std::make_pair(I->first, i); - } - } - - if(mOp.getType() != MachineOperand::MO_VirtualRegister && mOp.isUse()) { - assert("Our assumption is wrong. We have another type of register that needs to be saved\n"); - } - } - } - - - //Do a check to see if instruction was moved below its original branch - if(MTI->isBranch(I->first->getOpcode())) { - seenBranchesBB.insert(I->first->getParent()); - branchStage[I->first->getParent()] = I->second; - } - else { - instrsMovedDown[I->first->getParent()].push_back(std::make_pair(I->first, I->second)); - //assert(seenBranchesBB.count(I->first->getParent()) && "Instruction moved below branch\n"); - } - - } - - //The new loop will consist of one or more prologues, the kernel, and one or more epilogues. - - //Map to keep track of old to new values - std::map<Value*, std::map<int, Value*> > newValues; - - //Map to keep track of old to new values in kernel - std::map<Value*, std::map<int, Value*> > kernelPHIs; - - //Another map to keep track of what machine basic blocks these new value*s are in since - //they have no llvm instruction equivalent - std::map<Value*, MachineBasicBlock*> newValLocation; - - std::vector<std::vector<MachineBasicBlock*> > prologues; - std::vector<std::vector<BasicBlock*> > llvm_prologues; - - //Map to keep track of where the inner branches go - std::map<const MachineBasicBlock*, Value*> sideExits; - - - //Write prologue - if(schedule.getMaxStage() != 0) - writePrologues(prologues, SB, llvm_prologues, valuesToSave, newValues, newValLocation); - - std::vector<BasicBlock*> llvmKernelBBs; - std::vector<MachineBasicBlock*> machineKernelBBs; - Function *parent = (Function*) SB[0]->getBasicBlock()->getParent(); - - for(unsigned i = 0; i < SB.size(); ++i) { - llvmKernelBBs.push_back(new BasicBlock("Kernel", parent)); - - machineKernelBBs.push_back(new MachineBasicBlock(llvmKernelBBs[i])); - (((MachineBasicBlock*)SB[0])->getParent())->getBasicBlockList().push_back(machineKernelBBs[i]); - } - - writeKernel(llvmKernelBBs, machineKernelBBs, valuesToSave, newValues, newValLocation, kernelPHIs); - - - std::vector<std::vector<MachineBasicBlock*> > epilogues; - std::vector<std::vector<BasicBlock*> > llvm_epilogues; - - //Write epilogues - if(schedule.getMaxStage() != 0) - writeEpilogues(epilogues, SB, llvm_epilogues, valuesToSave, newValues, newValLocation, kernelPHIs); - - - //Fix our branches - fixBranches(prologues, llvm_prologues, machineKernelBBs, llvmKernelBBs, epilogues, llvm_epilogues, SB, sideExits); - - //Print out epilogues and prologue - DEBUG(for(std::vector<std::vector<MachineBasicBlock*> >::iterator PI = prologues.begin(), PE = prologues.end(); - PI != PE; ++PI) { - std::cerr << "PROLOGUE\n"; - for(std::vector<MachineBasicBlock*>::iterator I = PI->begin(), E = PI->end(); I != E; ++I) - (*I)->print(std::cerr); - }); - - DEBUG(std::cerr << "KERNEL\n"); - DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = machineKernelBBs.begin(), E = machineKernelBBs.end(); I != E; ++I) { (*I)->print(std::cerr);}); - - DEBUG(for(std::vector<std::vector<MachineBasicBlock*> >::iterator EI = epilogues.begin(), EE = epilogues.end(); - EI != EE; ++EI) { - std::cerr << "EPILOGUE\n"; - for(std::vector<MachineBasicBlock*>::iterator I = EI->begin(), E = EI->end(); I != E; ++I) - (*I)->print(std::cerr); - }); - - - //Remove phis - removePHIs(SB, prologues, epilogues, machineKernelBBs, newValLocation); - - //Print out epilogues and prologue - DEBUG(for(std::vector<std::vector<MachineBasicBlock*> >::iterator PI = prologues.begin(), PE = prologues.end(); - PI != PE; ++PI) { - std::cerr << "PROLOGUE\n"; - for(std::vector<MachineBasicBlock*>::iterator I = PI->begin(), E = PI->end(); I != E; ++I) - (*I)->print(std::cerr); - }); - - DEBUG(std::cerr << "KERNEL\n"); - DEBUG(for(std::vector<MachineBasicBlock*>::iterator I = machineKernelBBs.begin(), E = machineKernelBBs.end(); I != E; ++I) { (*I)->print(std::cerr);}); - - DEBUG(for(std::vector<std::vector<MachineBasicBlock*> >::iterator EI = epilogues.begin(), EE = epilogues.end(); - EI != EE; ++EI) { - std::cerr << "EPILOGUE\n"; - for(std::vector<MachineBasicBlock*>::iterator I = EI->begin(), E = EI->end(); I != E; ++I) - (*I)->print(std::cerr); - }); - - writeSideExits(prologues, llvm_prologues, epilogues, llvm_epilogues, sideExits, instrsMovedDown, SB, machineKernelBBs, branchStage); - - - DEBUG(std::cerr << "New Machine Function" << "\n"); -} - - -void ModuloSchedulingSBPass::fixBranches(std::vector<std::vector<MachineBasicBlock*> > &prologues, std::vector<std::vector<BasicBlock*> > &llvm_prologues, std::vector<MachineBasicBlock*> &machineKernelBB, std::vector<BasicBlock*> &llvmKernelBB, std::vector<std::vector<MachineBasicBlock*> > &epilogues, std::vector<std::vector<BasicBlock*> > &llvm_epilogues, std::vector<const MachineBasicBlock*> &SB, std::map<const MachineBasicBlock*, Value*> &sideExits) { - - const TargetInstrInfo *TMI = target.getInstrInfo(); - - //Get exit BB - BasicBlock *last = (BasicBlock*) SB[SB.size()-1]->getBasicBlock(); - BasicBlock *kernel_exit = 0; - bool sawFirst = false; - - for(succ_iterator I = succ_begin(last), - E = succ_end(last); I != E; ++I) { - if (*I != SB[0]->getBasicBlock()) { - kernel_exit = *I; - break; - } - else - sawFirst = true; - } - if(!kernel_exit && sawFirst) { - kernel_exit = (BasicBlock*) SB[0]->getBasicBlock(); - } - - assert(kernel_exit && "Kernel Exit can not be null"); - - if(schedule.getMaxStage() != 0) { - //Fix prologue branches - for(unsigned i = 0; i < prologues.size(); ++i) { - - for(unsigned j = 0; j < prologues[i].size(); ++j) { - - MachineBasicBlock *currentMBB = prologues[i][j]; - - //Find terminator since getFirstTerminator does not work! - for(MachineBasicBlock::reverse_iterator mInst = currentMBB->rbegin(), mInstEnd = currentMBB->rend(); mInst != mInstEnd; ++mInst) { - MachineOpCode OC = mInst->getOpcode(); - //If its a branch update its branchto - if(TMI->isBranch(OC)) { - for(unsigned opNum = 0; opNum < mInst->getNumOperands(); ++opNum) { - MachineOperand &mOp = mInst->getOperand(opNum); - if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - //Check if we are branching to the kernel, if not branch to epilogue - if(mOp.getVRegValue() == SB[0]->getBasicBlock()) { - if(i >= prologues.size()-1) - mOp.setValueReg(llvmKernelBB[0]); - else - mOp.setValueReg(llvm_prologues[i+1][0]); - } - else if( (mOp.getVRegValue() == kernel_exit) && (j == prologues[i].size()-1)) { - mOp.setValueReg(llvm_epilogues[i][0]); - } - else if(mOp.getVRegValue() == SB[j+1]->getBasicBlock()) { - mOp.setValueReg(llvm_prologues[i][j+1]); - } - - } - } - - DEBUG(std::cerr << "New Prologue Branch: " << *mInst << "\n"); - } - } - - //Update llvm basic block with our new branch instr - DEBUG(std::cerr << SB[i]->getBasicBlock()->getTerminator() << "\n"); - - const BranchInst *branchVal = dyn_cast<BranchInst>(SB[i]->getBasicBlock()->getTerminator()); - - //Check for inner branch - if(j < prologues[i].size()-1) { - //Find our side exit LLVM basic block - BasicBlock *sideExit = 0; - for(unsigned s = 0; s < branchVal->getNumSuccessors(); ++s) { - if(branchVal->getSuccessor(s) != SB[i+1]->getBasicBlock()) - sideExit = branchVal->getSuccessor(s); - } - assert(sideExit && "Must have side exit llvm basic block"); - TerminatorInst *newBranch = new BranchInst(sideExit, - llvm_prologues[i][j+1], - branchVal->getCondition(), - llvm_prologues[i][j]); - } - else { - //If last prologue - if(i == prologues.size()-1) { - TerminatorInst *newBranch = new BranchInst(llvmKernelBB[0], - llvm_epilogues[i][0], - branchVal->getCondition(), - llvm_prologues[i][j]); - } - else { - TerminatorInst *newBranch = new BranchInst(llvm_prologues[i+1][0], - llvm_epilogues[i][0], - branchVal->getCondition(), - llvm_prologues[i][j]); - } - } - } - } - } - - //Fix up kernel machine branches - for(unsigned i = 0; i < machineKernelBB.size(); ++i) { - MachineBasicBlock *currentMBB = machineKernelBB[i]; - - for(MachineBasicBlock::reverse_iterator mInst = currentMBB->rbegin(), mInstEnd = currentMBB->rend(); mInst != mInstEnd; ++mInst) { - MachineOpCode OC = mInst->getOpcode(); - if(TMI->isBranch(OC)) { - for(unsigned opNum = 0; opNum < mInst->getNumOperands(); ++opNum) { - MachineOperand &mOp = mInst->getOperand(opNum); - - if(mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - //Deal with inner kernel branches - if(i < machineKernelBB.size()-1) { - if(mOp.getVRegValue() == SB[i+1]->getBasicBlock()) - mOp.setValueReg(llvmKernelBB[i+1]); - //Side exit! - else { - sideExits[SB[i]] = mOp.getVRegValue(); - } - } - else { - if(mOp.getVRegValue() == SB[0]->getBasicBlock()) - mOp.setValueReg(llvmKernelBB[0]); - else { - if(llvm_epilogues.size() > 0) - mOp.setValueReg(llvm_epilogues[0][0]); - } - } - } - } - } - } - - //Update kernelLLVM branches - const BranchInst *branchVal = dyn_cast<BranchInst>(SB[0]->getBasicBlock()->getTerminator()); - - //deal with inner branch - if(i < machineKernelBB.size()-1) { - - //Find our side exit LLVM basic block - BasicBlock *sideExit = 0; - for(unsigned s = 0; s < branchVal->getNumSuccessors(); ++s) { - if(branchVal->getSuccessor(s) != SB[i+1]->getBasicBlock()) - sideExit = branchVal->getSuccessor(s); - } - assert(sideExit && "Must have side exit llvm basic block"); - TerminatorInst *newBranch = new BranchInst(sideExit, - llvmKernelBB[i+1], - branchVal->getCondition(), - llvmKernelBB[i]); - } - else { - //Deal with outter branches - if(epilogues.size() > 0) { - TerminatorInst *newBranch = new BranchInst(llvmKernelBB[0], - llvm_epilogues[0][0], - branchVal->getCondition(), - llvmKernelBB[i]); - } - else { - TerminatorInst *newBranch = new BranchInst(llvmKernelBB[0], - kernel_exit, - branchVal->getCondition(), - llvmKernelBB[i]); - } - } - } - - if(schedule.getMaxStage() != 0) { - - //Lastly add unconditional branches for the epilogues - for(unsigned i = 0; i < epilogues.size(); ++i) { - - for(unsigned j=0; j < epilogues[i].size(); ++j) { - //Now since we don't have fall throughs, add a unconditional - //branch to the next prologue - - //Before adding these, we need to check if the epilogue already has - //a branch in it - bool hasBranch = false; - /*if(j < epilogues[i].size()-1) { - MachineBasicBlock *currentMBB = epilogues[i][j]; - for(MachineBasicBlock::reverse_iterator mInst = currentMBB->rbegin(), mInstEnd = currentMBB->rend(); mInst != mInstEnd; ++mInst) { - - MachineOpCode OC = mInst->getOpcode(); - - //If its a branch update its branchto - if(TMI->isBranch(OC)) { - hasBranch = true; - for(unsigned opNum = 0; opNum < mInst->getNumOperands(); ++opNum) { - MachineOperand &mOp = mInst->getOperand(opNum); - if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - - if(mOp.getVRegValue() != sideExits[SB[j]]) { - mOp.setValueReg(llvm_epilogues[i][j+1]); - } - - } - } - - - DEBUG(std::cerr << "New Epilogue Branch: " << *mInst << "\n"); - } - } - if(hasBranch) { - const BranchInst *branchVal = dyn_cast<BranchInst>(SB[j]->getBasicBlock()->getTerminator()); - TerminatorInst *newBranch = new BranchInst((BasicBlock*)sideExits[SB[j]], - llvm_epilogues[i][j+1], - branchVal->getCondition(), - llvm_epilogues[i][j]); - } - }*/ - - if(!hasBranch) { - - //Handle inner branches - if(j < epilogues[i].size()-1) { - BuildMI(epilogues[i][j], V9::BA, 1).addPCDisp(llvm_epilogues[i][j+1]); - TerminatorInst *newBranch = new BranchInst(llvm_epilogues[i][j+1], - llvm_epilogues[i][j]); - } - else { - - //Check if this is the last epilogue - if(i != epilogues.size()-1) { - BuildMI(epilogues[i][j], V9::BA, 1).addPCDisp(llvm_epilogues[i+1][0]); - //Add unconditional branch to end of epilogue - TerminatorInst *newBranch = new BranchInst(llvm_epilogues[i+1][0], - llvm_epilogues[i][j]); - - } - else { - BuildMI(epilogues[i][j], V9::BA, 1).addPCDisp(kernel_exit); - TerminatorInst *newBranch = new BranchInst(kernel_exit, llvm_epilogues[i][j]); - } - } - - //Add one more nop! - BuildMI(epilogues[i][j], V9::NOP, 0); - - } - } - } - } - - //Find all llvm basic blocks that branch to the loop entry and - //change to our first prologue. - const BasicBlock *llvmBB = SB[0]->getBasicBlock(); - - std::vector<const BasicBlock*>Preds (pred_begin(llvmBB), pred_end(llvmBB)); - - for(std::vector<const BasicBlock*>::iterator P = Preds.begin(), - PE = Preds.end(); P != PE; ++P) { - if(*P == SB[SB.size()-1]->getBasicBlock()) - continue; - else { - DEBUG(std::cerr << "Found our entry BB\n"); - DEBUG((*P)->print(std::cerr)); - //Get the Terminator instruction for this basic block and print it out - //DEBUG(std::cerr << *((*P)->getTerminator()) << "\n"); - - //Update the terminator - TerminatorInst *term = ((BasicBlock*)*P)->getTerminator(); - for(unsigned i=0; i < term->getNumSuccessors(); ++i) { - if(term->getSuccessor(i) == llvmBB) { - DEBUG(std::cerr << "Replacing successor bb\n"); - if(llvm_prologues.size() > 0) { - term->setSuccessor(i, llvm_prologues[0][0]); - - DEBUG(std::cerr << "New Term" << *((*P)->getTerminator()) << "\n"); - - //Also update its corresponding machine instruction - MachineCodeForInstruction & tempMvec = - MachineCodeForInstruction::get(term); - for (unsigned j = 0; j < tempMvec.size(); j++) { - MachineInstr *temp = tempMvec[j]; - MachineOpCode opc = temp->getOpcode(); - if(TMI->isBranch(opc)) { - DEBUG(std::cerr << *temp << "\n"); - //Update branch - for(unsigned opNum = 0; opNum < temp->getNumOperands(); ++opNum) { - MachineOperand &mOp = temp->getOperand(opNum); - if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - if(mOp.getVRegValue() == llvmBB) - mOp.setValueReg(llvm_prologues[0][0]); - } - } - } - } - } - else { - term->setSuccessor(i, llvmKernelBB[0]); - - //Also update its corresponding machine instruction - MachineCodeForInstruction & tempMvec = - MachineCodeForInstruction::get(term); - for(unsigned j = 0; j < tempMvec.size(); j++) { - MachineInstr *temp = tempMvec[j]; - MachineOpCode opc = temp->getOpcode(); - if(TMI->isBranch(opc)) { - DEBUG(std::cerr << *temp << "\n"); - //Update branch - for(unsigned opNum = 0; opNum < temp->getNumOperands(); ++opNum) { - MachineOperand &mOp = temp->getOperand(opNum); - if(mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - if(mOp.getVRegValue() == llvmBB) - mOp.setValueReg(llvmKernelBB[0]); - } - } - } - } - } - } - } - break; - } - } - -} - - -void ModuloSchedulingSBPass::writePrologues(std::vector<std::vector<MachineBasicBlock *> > &prologues, std::vector<const MachineBasicBlock*> &origSB, std::vector<std::vector<BasicBlock*> > &llvm_prologues, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation) { - - //Keep a map to easily know whats in the kernel - std::map<int, std::set<const MachineInstr*> > inKernel; - int maxStageCount = 0; - - //Keep a map of new values we consumed in case they need to be added back - std::map<Value*, std::map<int, Value*> > consumedValues; - - DEBUG(schedule.print(std::cerr)); - - for(MSScheduleSB::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { - maxStageCount = std::max(maxStageCount, I->second); - - //Put int the map so we know what instructions in each stage are in the kernel - DEBUG(std::cerr << "Inserting instruction " << *(I->first) << " into map at stage " << I->second << "\n"); - inKernel[I->second].insert(I->first); - } - - //Get target information to look at machine operands - const TargetInstrInfo *mii = target.getInstrInfo(); - - //Now write the prologues - for(int i = 0; i < maxStageCount; ++i) { - std::vector<MachineBasicBlock*> current_prologue; - std::vector<BasicBlock*> current_llvm_prologue; - - for(std::vector<const MachineBasicBlock*>::iterator MB = origSB.begin(), - MBE = origSB.end(); MB != MBE; ++MB) { - const MachineBasicBlock *MBB = *MB; - //Create new llvm and machine bb - BasicBlock *llvmBB = new BasicBlock("PROLOGUE", (Function*) (MBB->getBasicBlock()->getParent())); - MachineBasicBlock *machineBB = new MachineBasicBlock(llvmBB); - - DEBUG(std::cerr << "i=" << i << "\n"); - - for(int j = i; j >= 0; --j) { - //iterate over instructions in original bb - for(MachineBasicBlock::const_iterator MI = MBB->begin(), - ME = MBB->end(); ME != MI; ++MI) { - if(inKernel[j].count(&*MI)) { - MachineInstr *instClone = MI->clone(); - machineBB->push_back(instClone); - - //If its a branch, insert a nop - if(mii->isBranch(instClone->getOpcode())) - BuildMI(machineBB, V9::NOP, 0); - - - DEBUG(std::cerr << "Cloning: " << *MI << "\n"); - - //After cloning, we may need to save the value that this instruction defines - for(unsigned opNum=0; opNum < MI->getNumOperands(); ++opNum) { - Instruction *tmp; - - //get machine operand - MachineOperand &mOp = instClone->getOperand(opNum); - if(mOp.getType() == MachineOperand::MO_VirtualRegister - && mOp.isDef()) { - - //Check if this is a value we should save - if(valuesToSave.count(mOp.getVRegValue())) { - //Save copy in tmpInstruction - tmp = new TmpInstruction(mOp.getVRegValue()); - - //Add TmpInstruction to safe LLVM Instruction MCFI - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) tmp); - - DEBUG(std::cerr << "Value: " << *(mOp.getVRegValue()) - << " New Value: " << *tmp << " Stage: " << i << "\n"); - - newValues[mOp.getVRegValue()][i]= tmp; - newValLocation[tmp] = machineBB; - - DEBUG(std::cerr << "Machine Instr Operands: " - << *(mOp.getVRegValue()) << ", 0, " << *tmp << "\n"); - - //Create machine instruction and put int machineBB - MachineInstr *saveValue; - if(mOp.getVRegValue()->getType() == Type::FloatTy) - saveValue = BuildMI(machineBB, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else if(mOp.getVRegValue()->getType() == Type::DoubleTy) - saveValue = BuildMI(machineBB, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else - saveValue = BuildMI(machineBB, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - - - DEBUG(std::cerr << "Created new machine instr: " << *saveValue << "\n"); - } - } - - //We may also need to update the value that we use if - //its from an earlier prologue - if(j != 0) { - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse()) { - if(newValues.count(mOp.getVRegValue())) { - if(newValues[mOp.getVRegValue()].count(i-1)) { - Value *oldV = mOp.getVRegValue(); - DEBUG(std::cerr << "Replaced this value: " << mOp.getVRegValue() << " With:" << (newValues[mOp.getVRegValue()][i-1]) << "\n"); - //Update the operand with the right value - mOp.setValueReg(newValues[mOp.getVRegValue()][i-1]); - - //Remove this value since we have consumed it - //NOTE: Should this only be done if j != maxStage? - consumedValues[oldV][i-1] = (newValues[oldV][i-1]); - DEBUG(std::cerr << "Deleted value: " << consumedValues[oldV][i-1] << "\n"); - newValues[oldV].erase(i-1); - } - } - else - if(consumedValues.count(mOp.getVRegValue())) - assert(!consumedValues[mOp.getVRegValue()].count(i-1) && "Found a case where we need the value"); - } - } - } - } - } - } - (((MachineBasicBlock*)MBB)->getParent())->getBasicBlockList().push_back(machineBB); - current_prologue.push_back(machineBB); - current_llvm_prologue.push_back(llvmBB); - } - prologues.push_back(current_prologue); - llvm_prologues.push_back(current_llvm_prologue); - - } -} - - -void ModuloSchedulingSBPass::writeEpilogues(std::vector<std::vector<MachineBasicBlock*> > &epilogues, std::vector<const MachineBasicBlock*> &origSB, std::vector<std::vector<BasicBlock*> > &llvm_epilogues, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues,std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs ) { - - std::map<int, std::set<const MachineInstr*> > inKernel; - const TargetInstrInfo *MTI = target.getInstrInfo(); - - for(MSScheduleSB::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { - - //Put int the map so we know what instructions in each stage are in the kernel - inKernel[I->second].insert(I->first); - } - - std::map<Value*, Value*> valPHIs; - - //some debug stuff, will remove later - DEBUG(for(std::map<Value*, std::map<int, Value*> >::iterator V = newValues.begin(), E = newValues.end(); V !=E; ++V) { - std::cerr << "Old Value: " << *(V->first) << "\n"; - for(std::map<int, Value*>::iterator I = V->second.begin(), IE = V->second.end(); I != IE; ++I) - std::cerr << "Stage: " << I->first << " Value: " << *(I->second) << "\n"; - }); - - - //Now write the epilogues - for(int i = schedule.getMaxStage()-1; i >= 0; --i) { - std::vector<MachineBasicBlock*> current_epilogue; - std::vector<BasicBlock*> current_llvm_epilogue; - - for(std::vector<const MachineBasicBlock*>::iterator MB = origSB.begin(), MBE = origSB.end(); MB != MBE; ++MB) { - const MachineBasicBlock *MBB = *MB; - - BasicBlock *llvmBB = new BasicBlock("EPILOGUE", (Function*) (MBB->getBasicBlock()->getParent())); - MachineBasicBlock *machineBB = new MachineBasicBlock(llvmBB); - - DEBUG(std::cerr << " Epilogue #: " << i << "\n"); - - std::map<Value*, int> inEpilogue; - - for(MachineBasicBlock::const_iterator MI = MBB->begin(), ME = MBB->end(); ME != MI; ++MI) { - for(int j=schedule.getMaxStage(); j > i; --j) { - if(inKernel[j].count(&*MI)) { - DEBUG(std::cerr << "Cloning instruction " << *MI << "\n"); - MachineInstr *clone = MI->clone(); - - //Update operands that need to use the result from the phi - for(unsigned opNum=0; opNum < clone->getNumOperands(); ++opNum) { - //get machine operand - const MachineOperand &mOp = clone->getOperand(opNum); - - if((mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse())) { - - DEBUG(std::cerr << "Writing PHI for " << (mOp.getVRegValue()) << "\n"); - - //If this is the last instructions for the max iterations ago, don't update operands - if(inEpilogue.count(mOp.getVRegValue())) - if(inEpilogue[mOp.getVRegValue()] == i) - continue; - - //Quickly write appropriate phis for this operand - if(newValues.count(mOp.getVRegValue())) { - if(newValues[mOp.getVRegValue()].count(i)) { - Instruction *tmp = new TmpInstruction(newValues[mOp.getVRegValue()][i]); - - //Get machine code for this instruction - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) tmp); - - //assert of no kernelPHI for this value - assert(kernelPHIs[mOp.getVRegValue()][i] !=0 && "Must have final kernel phi to construct epilogue phi"); - - MachineInstr *saveValue = BuildMI(machineBB, V9::PHI, 3).addReg(newValues[mOp.getVRegValue()][i]).addReg(kernelPHIs[mOp.getVRegValue()][i]).addRegDef(tmp); - DEBUG(std::cerr << "Resulting PHI: " << *saveValue << "\n"); - valPHIs[mOp.getVRegValue()] = tmp; - } - } - - if(valPHIs.count(mOp.getVRegValue())) { - //Update the operand in the cloned instruction - clone->getOperand(opNum).setValueReg(valPHIs[mOp.getVRegValue()]); - } - } - else if((mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef())) { - inEpilogue[mOp.getVRegValue()] = i; - } - - } - machineBB->push_back(clone); - //if(MTI->isBranch(clone->getOpcode())) - //BuildMI(machineBB, V9::NOP, 0); - } - } - } - (((MachineBasicBlock*)MBB)->getParent())->getBasicBlockList().push_back(machineBB); - current_epilogue.push_back(machineBB); - current_llvm_epilogue.push_back(llvmBB); - } - - DEBUG(std::cerr << "EPILOGUE #" << i << "\n"); - DEBUG(for(std::vector<MachineBasicBlock*>::iterator B = current_epilogue.begin(), BE = current_epilogue.end(); B != BE; ++B) { - (*B)->print(std::cerr);}); - - epilogues.push_back(current_epilogue); - llvm_epilogues.push_back(current_llvm_epilogue); - } -} - -void ModuloSchedulingSBPass::writeKernel(std::vector<BasicBlock*> &llvmBB, std::vector<MachineBasicBlock*> &machineBB, std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, std::map<Value*, std::map<int, Value*> > &newValues, std::map<Value*, MachineBasicBlock*> &newValLocation, std::map<Value*, std::map<int, Value*> > &kernelPHIs) { - - //Keep track of operands that are read and saved from a previous iteration. The new clone - //instruction will use the result of the phi instead. - std::map<Value*, Value*> finalPHIValue; - std::map<Value*, Value*> kernelValue; - - //Branches are a special case - std::vector<MachineInstr*> branches; - - //Get target information to look at machine operands - const TargetInstrInfo *mii = target.getInstrInfo(); - unsigned index = 0; - int numBr = 0; - bool seenBranch = false; - - //Create TmpInstructions for the final phis - for(MSScheduleSB::kernel_iterator I = schedule.kernel_begin(), E = schedule.kernel_end(); I != E; ++I) { - - DEBUG(std::cerr << "Stage: " << I->second << " Inst: " << *(I->first) << "\n";); - - //Clone instruction - const MachineInstr *inst = I->first; - MachineInstr *instClone = inst->clone(); - - if(seenBranch && !mii->isBranch(instClone->getOpcode())) { - index++; - seenBranch = false; - numBr = 0; - } - else if(seenBranch && (numBr == 2)) { - index++; - numBr = 0; - } - - //Insert into machine basic block - assert(index < machineBB.size() && "Must have a valid index into kernel MBBs"); - machineBB[index]->push_back(instClone); - - if(mii->isBranch(instClone->getOpcode())) { - BuildMI(machineBB[index], V9::NOP, 0); - - seenBranch = true; - numBr++; - } - - DEBUG(std::cerr << "Cloned Inst: " << *instClone << "\n"); - - //Loop over Machine Operands - for(unsigned i=0; i < inst->getNumOperands(); ++i) { - //get machine operand - const MachineOperand &mOp = inst->getOperand(i); - - if(I->second != 0) { - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isUse()) { - - //Check to see where this operand is defined if this instruction is from max stage - if(I->second == schedule.getMaxStage()) { - DEBUG(std::cerr << "VREG: " << *(mOp.getVRegValue()) << "\n"); - } - - //If its in the value saved, we need to create a temp instruction and use that instead - if(valuesToSave.count(mOp.getVRegValue())) { - - //Check if we already have a final PHI value for this - if(!finalPHIValue.count(mOp.getVRegValue())) { - //Only create phi if the operand def is from a stage before this one - if(schedule.defPreviousStage(mOp.getVRegValue(), I->second)) { - TmpInstruction *tmp = new TmpInstruction(mOp.getVRegValue()); - - //Get machine code for this instruction - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) tmp); - - //Update the operand in the cloned instruction - instClone->getOperand(i).setValueReg(tmp); - - //save this as our final phi - finalPHIValue[mOp.getVRegValue()] = tmp; - newValLocation[tmp] = machineBB[index]; - } - } - else { - //Use the previous final phi value - instClone->getOperand(i).setValueReg(finalPHIValue[mOp.getVRegValue()]); - } - } - } - } - if(I->second != schedule.getMaxStage()) { - if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) { - if(valuesToSave.count(mOp.getVRegValue())) { - - TmpInstruction *tmp = new TmpInstruction(mOp.getVRegValue()); - - //Get machine code for this instruction - MachineCodeForInstruction & tempVec = MachineCodeForInstruction::get(defaultInst); - tempVec.addTemp((Value*) tmp); - - //Create new machine instr and put in MBB - MachineInstr *saveValue; - if(mOp.getVRegValue()->getType() == Type::FloatTy) - saveValue = BuildMI(machineBB[index], V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else if(mOp.getVRegValue()->getType() == Type::DoubleTy) - saveValue = BuildMI(machineBB[index], V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else - saveValue = BuildMI(machineBB[index], V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - - - //Save for future cleanup - kernelValue[mOp.getVRegValue()] = tmp; - newValLocation[tmp] = machineBB[index]; - kernelPHIs[mOp.getVRegValue()][schedule.getMaxStage()-1] = tmp; - } - } - } - } - - } - - //Loop over each value we need to generate phis for - for(std::map<Value*, std::map<int, Value*> >::iterator V = newValues.begin(), - E = newValues.end(); V != E; ++V) { - - - DEBUG(std::cerr << "Writing phi for" << *(V->first)); - DEBUG(std::cerr << "\nMap of Value* for this phi\n"); - DEBUG(for(std::map<int, Value*>::iterator I = V->second.begin(), - IE = V->second.end(); I != IE; ++I) { - std::cerr << "Stage: " << I->first; - std::cerr << " Value: " << *(I->second) << "\n"; - }); - - //If we only have one current iteration live, its safe to set - //lastPhi = to kernel value - if(V->second.size() == 1) { - assert(kernelValue[V->first] != 0 && "Kernel value* must exist to create phi"); - MachineInstr *saveValue = BuildMI(*machineBB[0], machineBB[0]->begin(),V9::PHI, 3).addReg(V->second.begin()->second).addReg(kernelValue[V->first]).addRegDef(finalPHIValue[V->first]); - DEBUG(std::cerr << "Resulting PHI (one live): " << *saveValue << "\n"); - kernelPHIs[V->first][V->second.begin()->first] = kernelValue[V->first]; - DEBUG(std::cerr << "Put kernel phi in at stage: " << schedule.getMaxStage()-1 << " (map stage = " << V->second.begin()->first << ")\n"); - } - else { - - //Keep track of last phi created. - Instruction *lastPhi = 0; - - unsigned count = 1; - //Loop over the the map backwards to generate phis - for(std::map<int, Value*>::reverse_iterator I = V->second.rbegin(), IE = V->second.rend(); - I != IE; ++I) { - - if(count < (V->second).size()) { - if(lastPhi == 0) { - lastPhi = new TmpInstruction(I->second); - - //Get machine code for this instruction - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) lastPhi); - - MachineInstr *saveValue = BuildMI(*machineBB[0], machineBB[0]->begin(), V9::PHI, 3).addReg(kernelValue[V->first]).addReg(I->second).addRegDef(lastPhi); - DEBUG(std::cerr << "Resulting PHI: " << *saveValue << "\n"); - newValLocation[lastPhi] = machineBB[0]; - } - else { - Instruction *tmp = new TmpInstruction(I->second); - - //Get machine code for this instruction - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - tempMvec.addTemp((Value*) tmp); - - - MachineInstr *saveValue = BuildMI(*machineBB[0], machineBB[0]->begin(), V9::PHI, 3).addReg(lastPhi).addReg(I->second).addRegDef(tmp); - DEBUG(std::cerr << "Resulting PHI: " << *saveValue << "\n"); - lastPhi = tmp; - kernelPHIs[V->first][I->first] = lastPhi; - newValLocation[lastPhi] = machineBB[0]; - } - } - //Final phi value - else { - //The resulting value must be the Value* we created earlier - assert(lastPhi != 0 && "Last phi is NULL!\n"); - MachineInstr *saveValue = BuildMI(*machineBB[0], machineBB[0]->begin(), V9::PHI, 3).addReg(lastPhi).addReg(I->second).addRegDef(finalPHIValue[V->first]); - DEBUG(std::cerr << "Resulting PHI: " << *saveValue << "\n"); - kernelPHIs[V->first][I->first] = finalPHIValue[V->first]; - } - - ++count; - } - - } - } -} - - -void ModuloSchedulingSBPass::removePHIs(std::vector<const MachineBasicBlock*> &SB, std::vector<std::vector<MachineBasicBlock*> > &prologues, std::vector<std::vector<MachineBasicBlock*> > &epilogues, std::vector<MachineBasicBlock*> &kernelBB, std::map<Value*, MachineBasicBlock*> &newValLocation) { - - //Worklist to delete things - std::vector<std::pair<MachineBasicBlock*, MachineBasicBlock::iterator> > worklist; - - //Worklist of TmpInstructions that need to be added to a MCFI - std::vector<Instruction*> addToMCFI; - - //Worklist to add OR instructions to end of kernel so not to invalidate the iterator - //std::vector<std::pair<Instruction*, Value*> > newORs; - - const TargetInstrInfo *TMI = target.getInstrInfo(); - - //Start with the kernel and for each phi insert a copy for the phi - //def and for each arg - //phis are only in the first BB in the kernel - for(MachineBasicBlock::iterator I = kernelBB[0]->begin(), E = kernelBB[0]->end(); - I != E; ++I) { - - DEBUG(std::cerr << "Looking at Instr: " << *I << "\n"); - - //Get op code and check if its a phi - if(I->getOpcode() == V9::PHI) { - - DEBUG(std::cerr << "Replacing PHI: " << *I << "\n"); - Instruction *tmp = 0; - - for(unsigned i = 0; i < I->getNumOperands(); ++i) { - - //Get Operand - const MachineOperand &mOp = I->getOperand(i); - assert(mOp.getType() == MachineOperand::MO_VirtualRegister - && "Should be a Value*\n"); - - if(!tmp) { - tmp = new TmpInstruction(mOp.getVRegValue()); - addToMCFI.push_back(tmp); - } - - //Now for all our arguments we read, OR to the new - //TmpInstruction that we created - if(mOp.isUse()) { - DEBUG(std::cerr << "Use: " << mOp << "\n"); - //Place a copy at the end of its BB but before the branches - assert(newValLocation.count(mOp.getVRegValue()) && "We must know where this value is located\n"); - //Reverse iterate to find the branches, we can safely assume no instructions have been - //put in the nop positions - for(MachineBasicBlock::iterator inst = --(newValLocation[mOp.getVRegValue()])->end(), endBB = (newValLocation[mOp.getVRegValue()])->begin(); inst != endBB; --inst) { - MachineOpCode opc = inst->getOpcode(); - if(TMI->isBranch(opc) || TMI->isNop(opc)) - continue; - else { - if(mOp.getVRegValue()->getType() == Type::FloatTy) - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else if(mOp.getVRegValue()->getType() == Type::DoubleTy) - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - - break; - } - - } - - } - else { - //Remove the phi and replace it with an OR - DEBUG(std::cerr << "Def: " << mOp << "\n"); - //newORs.push_back(std::make_pair(tmp, mOp.getVRegValue())); - if(tmp->getType() == Type::FloatTy) - BuildMI(*kernelBB[0], I, V9::FMOVS, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else if(tmp->getType() == Type::DoubleTy) - BuildMI(*kernelBB[0], I, V9::FMOVD, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else - BuildMI(*kernelBB[0], I, V9::ORr, 3).addReg(tmp).addImm(0).addRegDef(mOp.getVRegValue()); - - - worklist.push_back(std::make_pair(kernelBB[0], I)); - } - - } - - } - - - } - - //Add TmpInstructions to some MCFI - if(addToMCFI.size() > 0) { - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - for(unsigned x = 0; x < addToMCFI.size(); ++x) { - tempMvec.addTemp(addToMCFI[x]); - } - addToMCFI.clear(); - } - - - //Remove phis from epilogue - for(std::vector<std::vector<MachineBasicBlock*> >::iterator MB = epilogues.begin(), - ME = epilogues.end(); MB != ME; ++MB) { - - for(std::vector<MachineBasicBlock*>::iterator currentMBB = MB->begin(), currentME = MB->end(); currentMBB != currentME; ++currentMBB) { - - for(MachineBasicBlock::iterator I = (*currentMBB)->begin(), - E = (*currentMBB)->end(); I != E; ++I) { - - DEBUG(std::cerr << "Looking at Instr: " << *I << "\n"); - //Get op code and check if its a phi - if(I->getOpcode() == V9::PHI) { - Instruction *tmp = 0; - - for(unsigned i = 0; i < I->getNumOperands(); ++i) { - //Get Operand - const MachineOperand &mOp = I->getOperand(i); - assert(mOp.getType() == MachineOperand::MO_VirtualRegister && "Should be a Value*\n"); - - if(!tmp) { - tmp = new TmpInstruction(mOp.getVRegValue()); - addToMCFI.push_back(tmp); - } - - //Now for all our arguments we read, OR to the new TmpInstruction that we created - if(mOp.isUse()) { - DEBUG(std::cerr << "Use: " << mOp << "\n"); - //Place a copy at the end of its BB but before the branches - assert(newValLocation.count(mOp.getVRegValue()) && "We must know where this value is located\n"); - //Reverse iterate to find the branches, we can safely assume no instructions have been - //put in the nop positions - for(MachineBasicBlock::iterator inst = --(newValLocation[mOp.getVRegValue()])->end(), endBB = (newValLocation[mOp.getVRegValue()])->begin(); inst != endBB; --inst) { - MachineOpCode opc = inst->getOpcode(); - if(TMI->isBranch(opc) || TMI->isNop(opc)) - continue; - else { - if(mOp.getVRegValue()->getType() == Type::FloatTy) - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVS, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else if(mOp.getVRegValue()->getType() == Type::DoubleTy) - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::FMOVD, 3).addReg(mOp.getVRegValue()).addRegDef(tmp); - else - BuildMI(*(newValLocation[mOp.getVRegValue()]), ++inst, V9::ORr, 3).addReg(mOp.getVRegValue()).addImm(0).addRegDef(tmp); - - - break; - } - - } - - } - else { - //Remove the phi and replace it with an OR - DEBUG(std::cerr << "Def: " << mOp << "\n"); - if(tmp->getType() == Type::FloatTy) - BuildMI(**currentMBB, I, V9::FMOVS, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else if(tmp->getType() == Type::DoubleTy) - BuildMI(**currentMBB, I, V9::FMOVD, 3).addReg(tmp).addRegDef(mOp.getVRegValue()); - else - BuildMI(**currentMBB, I, V9::ORr, 3).addReg(tmp).addImm(0).addRegDef(mOp.getVRegValue()); - - worklist.push_back(std::make_pair(*currentMBB,I)); - } - } - } - } - } - } - - - if(addToMCFI.size() > 0) { - MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(defaultInst); - for(unsigned x = 0; x < addToMCFI.size(); ++x) { - tempMvec.addTemp(addToMCFI[x]); - } - addToMCFI.clear(); - } - - //Delete the phis - for(std::vector<std::pair<MachineBasicBlock*, MachineBasicBlock::iterator> >::iterator I = worklist.begin(), E = worklist.end(); I != E; ++I) { - DEBUG(std::cerr << "Deleting PHI " << *I->second << "\n"); - I->first->erase(I->second); - - } - - - assert((addToMCFI.size() == 0) && "We should have added all TmpInstructions to some MachineCodeForInstruction"); -} - - - - -void ModuloSchedulingSBPass::writeSideExits(std::vector<std::vector<MachineBasicBlock *> > &prologues, std::vector<std::vector<BasicBlock*> > &llvm_prologues, std::vector<std::vector<MachineBasicBlock *> > &epilogues, std::vector<std::vector<BasicBlock*> > &llvm_epilogues, std::map<const MachineBasicBlock*, Value*> &sideExits, std::map<MachineBasicBlock*, std::vector<std::pair<MachineInstr*, int> > > &instrsMovedDown, std::vector<const MachineBasicBlock*> &SB, std::vector<MachineBasicBlock*> &kernelMBBs, std::map<MachineBasicBlock*, int> branchStage) { - - const TargetInstrInfo *TMI = target.getInstrInfo(); - - //Repeat for each side exit - for(unsigned sideExitNum = 0; sideExitNum < SB.size()-1; ++sideExitNum) { - - std::vector<std::vector<BasicBlock*> > side_llvm_epilogues; - std::vector<std::vector<MachineBasicBlock*> > side_epilogues; - MachineBasicBlock* sideMBB; - BasicBlock* sideBB; - - //Create side exit blocks - //Get the LLVM basic block - BasicBlock *bb = (BasicBlock*) SB[sideExitNum]->getBasicBlock(); - MachineBasicBlock *mbb = (MachineBasicBlock*) SB[sideExitNum]; - - int stage = branchStage[mbb]; - - //Create new basic blocks for our side exit instructios that were moved below the branch - sideBB = new BasicBlock("SideExit", (Function*) bb->getParent()); - sideMBB = new MachineBasicBlock(sideBB); - (((MachineBasicBlock*)SB[0])->getParent())->getBasicBlockList().push_back(sideMBB); - - - if(instrsMovedDown.count(mbb)) { - for(std::vector<std::pair<MachineInstr*, int> >::iterator I = instrsMovedDown[mbb].begin(), E = instrsMovedDown[mbb].end(); I != E; ++I) { - if(branchStage[mbb] == I->second) - sideMBB->push_back((I->first)->clone()); - } - - //Add unconditional branches to original exits - BuildMI(sideMBB, V9::BA, 1).addPCDisp(sideExits[mbb]); - BuildMI(sideMBB, V9::NOP, 0); - - //Add unconditioal branch to llvm BB - BasicBlock *extBB = dyn_cast<BasicBlock>(sideExits[mbb]); - assert(extBB && "Side exit basicblock can not be null"); - TerminatorInst *newBranch = new BranchInst(extBB, sideBB); - } - - //Clone epilogues and update their branches, one cloned epilogue set per side exit - //only clone epilogues that are from a greater stage! - for(unsigned i = 0; i < epilogues.size()-stage; ++i) { - std::vector<MachineBasicBlock*> MB = epilogues[i]; - - std::vector<MachineBasicBlock*> newEp; - std::vector<BasicBlock*> newLLVMEp; - - for(std::vector<MachineBasicBlock*>::iterator currentMBB = MB.begin(), - lastMBB = MB.end(); currentMBB != lastMBB; ++currentMBB) { - BasicBlock *tmpBB = new BasicBlock("SideEpilogue", (Function*) (*currentMBB)->getBasicBlock()->getParent()); - MachineBasicBlock *tmp = new MachineBasicBlock(tmpBB); - - //Clone instructions and insert into new MBB - for(MachineBasicBlock::iterator I = (*currentMBB)->begin(), - E = (*currentMBB)->end(); I != E; ++I) { - - MachineInstr *clone = I->clone(); - if(clone->getOpcode() == V9::BA && (currentMBB+1 == lastMBB)) { - //update branch to side exit - for(unsigned i = 0; i < clone->getNumOperands(); ++i) { - MachineOperand &mOp = clone->getOperand(i); - if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - mOp.setValueReg(sideBB); - } - } - } - - tmp->push_back(clone); - - } - - //Add llvm branch - TerminatorInst *newBranch = new BranchInst(sideBB, tmpBB); - - newEp.push_back(tmp); - (((MachineBasicBlock*)SB[0])->getParent())->getBasicBlockList().push_back(tmp); - - newLLVMEp.push_back(tmpBB); - - } - side_llvm_epilogues.push_back(newLLVMEp); - side_epilogues.push_back(newEp); - } - - //Now stich up all the branches - - //Loop over prologues, and if its an inner branch and branches to our original side exit - //then have it branch to the appropriate epilogue first (if it exists) - for(unsigned P = 0; P < prologues.size(); ++P) { - - //Get BB side exit we are dealing with - MachineBasicBlock *currentMBB = prologues[P][sideExitNum]; - if(P >= (unsigned) stage) { - //Iterate backwards of machine instructions to find the branch we need to update - for(MachineBasicBlock::reverse_iterator mInst = currentMBB->rbegin(), mInstEnd = currentMBB->rend(); mInst != mInstEnd; ++mInst) { - MachineOpCode OC = mInst->getOpcode(); - - //If its a branch update its branchto - if(TMI->isBranch(OC)) { - for(unsigned opNum = 0; opNum < mInst->getNumOperands(); ++opNum) { - MachineOperand &mOp = mInst->getOperand(opNum); - if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - //Check if we branch to side exit - if(mOp.getVRegValue() == sideExits[mbb]) { - mOp.setValueReg(side_llvm_epilogues[P][0]); - } - } - } - DEBUG(std::cerr << "New Prologue Branch: " << *mInst << "\n"); - } - } - - //Update llvm branch - TerminatorInst *branchVal = ((BasicBlock*) currentMBB->getBasicBlock())->getTerminator(); - DEBUG(std::cerr << *branchVal << "\n"); - - for(unsigned i=0; i < branchVal->getNumSuccessors(); ++i) { - if(branchVal->getSuccessor(i) == sideExits[mbb]) { - DEBUG(std::cerr << "Replacing successor bb\n"); - branchVal->setSuccessor(i, side_llvm_epilogues[P][0]); - } - } - } - else { - //must add BA branch because another prologue or kernel has the actual side exit branch - //Add unconditional branches to original exits - assert( (sideExitNum+1) < prologues[P].size() && "must have valid prologue to branch to"); - BuildMI(prologues[P][sideExitNum], V9::BA, 1).addPCDisp((BasicBlock*)(prologues[P][sideExitNum+1])->getBasicBlock()); - BuildMI(prologues[P][sideExitNum], V9::NOP, 0); - - TerminatorInst *newBranch = new BranchInst((BasicBlock*) (prologues[P][sideExitNum+1])->getBasicBlock(), (BasicBlock*) (prologues[P][sideExitNum])->getBasicBlock()); - - } - } - - - //Update side exits in kernel - MachineBasicBlock *currentMBB = kernelMBBs[sideExitNum]; - //Iterate backwards of machine instructions to find the branch we need to update - for(MachineBasicBlock::reverse_iterator mInst = currentMBB->rbegin(), mInstEnd = currentMBB->rend(); mInst != mInstEnd; ++mInst) { - MachineOpCode OC = mInst->getOpcode(); - - //If its a branch update its branchto - if(TMI->isBranch(OC)) { - for(unsigned opNum = 0; opNum < mInst->getNumOperands(); ++opNum) { - MachineOperand &mOp = mInst->getOperand(opNum); - if (mOp.getType() == MachineOperand::MO_PCRelativeDisp) { - //Check if we branch to side exit - if(mOp.getVRegValue() == sideExits[mbb]) { - if(side_llvm_epilogues.size() > 0) - mOp.setValueReg(side_llvm_epilogues[0][0]); - else - mOp.setValueReg(sideBB); - } - } - } - DEBUG(std::cerr << "New Prologue Branch: " << *mInst << "\n"); - } - } - - //Update llvm branch - //Update llvm branch - TerminatorInst *branchVal = ((BasicBlock*)currentMBB->getBasicBlock())->getTerminator(); - DEBUG(std::cerr << *branchVal << "\n"); - - for(unsigned i=0; i < branchVal->getNumSuccessors(); ++i) { - if(branchVal->getSuccessor(i) == sideExits[mbb]) { - DEBUG(std::cerr << "Replacing successor bb\n"); - if(side_llvm_epilogues.size() > 0) - branchVal->setSuccessor(i, side_llvm_epilogues[0][0]); - else - branchVal->setSuccessor(i, sideBB); - } - } - } -} - diff --git a/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.h b/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.h deleted file mode 100644 index 669611e9261..00000000000 --- a/llvm/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.h +++ /dev/null @@ -1,192 +0,0 @@ -//===-- ModuloSchedulingSuperBlock.h -Swing Modulo Scheduling-----*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -//Swing Modulo Scheduling done on Superblocks ( entry, multiple exit, -//multiple basic block loops). -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_MODULOSCHEDULINGSB_H -#define LLVM_MODULOSCHEDULINGSB_H - -#include "llvm/Analysis/LoopInfo.h" -#include "llvm/Analysis/ScalarEvolution.h" -#include "llvm/Function.h" -#include "llvm/Pass.h" -#include "llvm/CodeGen/MachineBasicBlock.h" -#include "MSScheduleSB.h" -#include "MSchedGraphSB.h" - - -namespace llvm { - - //Struct to contain ModuloScheduling Specific Information for each node - struct MSNodeSBAttributes { - int ASAP; //Earliest time at which the opreation can be scheduled - int ALAP; //Latest time at which the operation can be scheduled. - int MOB; - int depth; - int height; - MSNodeSBAttributes(int asap=-1, int alap=-1, int mob=-1, - int d=-1, int h=-1) : ASAP(asap), ALAP(alap), - MOB(mob), depth(d), - height(h) {} - }; - - - typedef std::vector<const MachineBasicBlock*> SuperBlock; - - class ModuloSchedulingSBPass : public FunctionPass { - const TargetMachine ⌖ - - //Map to hold Value* defs - std::map<const Value*, MachineInstr*> defMap; - - //Map to hold list of instructions associate to the induction var for each BB - std::map<SuperBlock, std::map<const MachineInstr*, unsigned> > indVarInstrs; - - //Map to hold machine to llvm instrs for each valid BB - std::map<SuperBlock, std::map<MachineInstr*, Instruction*> > machineTollvm; - - //LLVM Instruction we know we can add TmpInstructions to its MCFI - Instruction *defaultInst; - - //Map that holds node to node attribute information - std::map<MSchedGraphSBNode*, MSNodeSBAttributes> nodeToAttributesMap; - - //Map to hold all reccurrences - std::set<std::pair<int, std::vector<MSchedGraphSBNode*> > > recurrenceList; - - //Set of edges to ignore, stored as src node and index into vector of successors - std::set<std::pair<MSchedGraphSBNode*, unsigned> > edgesToIgnore; - - //Vector containing the partial order - std::vector<std::set<MSchedGraphSBNode*> > partialOrder; - - //Vector containing the final node order - std::vector<MSchedGraphSBNode*> FinalNodeOrder; - - //Schedule table, key is the cycle number and the vector is resource, node pairs - MSScheduleSB schedule; - - //Current initiation interval - int II; - - //Internal Functions - void FindSuperBlocks(Function &F, LoopInfo &LI, - std::vector<std::vector<const MachineBasicBlock*> > &Worklist); - bool MachineBBisValid(const MachineBasicBlock *B, - std::map<const MachineInstr*, unsigned> &indexMap, - unsigned &offset); - bool CreateDefMap(std::vector<const MachineBasicBlock*> &SB); - bool getIndVar(std::vector<const MachineBasicBlock*> &superBlock, - std::map<BasicBlock*, MachineBasicBlock*> &bbMap, - std::map<const MachineInstr*, unsigned> &indexMap); - bool assocIndVar(Instruction *I, std::set<Instruction*> &indVar, - std::vector<Instruction*> &stack, - std::map<BasicBlock*, MachineBasicBlock*> &bbMap, - const BasicBlock *first, - std::set<const BasicBlock*> &llvmSuperBlock); - int calculateResMII(std::vector<const MachineBasicBlock*> &superBlock); - int calculateRecMII(MSchedGraphSB *graph, int MII); - void findAllCircuits(MSchedGraphSB *g, int II); - void addRecc(std::vector<MSchedGraphSBNode*> &stack, - std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes); - bool circuit(MSchedGraphSBNode *v, std::vector<MSchedGraphSBNode*> &stack, - std::set<MSchedGraphSBNode*> &blocked, std::vector<MSchedGraphSBNode*> &SCC, - MSchedGraphSBNode *s, std::map<MSchedGraphSBNode*, - std::set<MSchedGraphSBNode*> > &B, - int II, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes); - void unblock(MSchedGraphSBNode *u, std::set<MSchedGraphSBNode*> &blocked, - std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > &B); - void addSCC(std::vector<MSchedGraphSBNode*> &SCC, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes); - void calculateNodeAttributes(MSchedGraphSB *graph, int MII); - bool ignoreEdge(MSchedGraphSBNode *srcNode, MSchedGraphSBNode *destNode); - int calculateASAP(MSchedGraphSBNode *node, int MII, MSchedGraphSBNode *destNode); - int calculateALAP(MSchedGraphSBNode *node, int MII, - int maxASAP, MSchedGraphSBNode *srcNode); - int findMaxASAP(); - int calculateHeight(MSchedGraphSBNode *node,MSchedGraphSBNode *srcNode); - int calculateDepth(MSchedGraphSBNode *node, MSchedGraphSBNode *destNode); - void computePartialOrder(); - void connectedComponentSet(MSchedGraphSBNode *node, std::set<MSchedGraphSBNode*> &ccSet, - std::set<MSchedGraphSBNode*> &lastNodes); - void searchPath(MSchedGraphSBNode *node, - std::vector<MSchedGraphSBNode*> &path, - std::set<MSchedGraphSBNode*> &nodesToAdd, - std::set<MSchedGraphSBNode*> &new_reccurrence); - void orderNodes(); - bool computeSchedule(std::vector<const MachineBasicBlock*> &BB, MSchedGraphSB *MSG); - bool scheduleNode(MSchedGraphSBNode *node, int start, int end); - void predIntersect(std::set<MSchedGraphSBNode*> &CurrentSet, std::set<MSchedGraphSBNode*> &IntersectResult); - void succIntersect(std::set<MSchedGraphSBNode*> &CurrentSet, std::set<MSchedGraphSBNode*> &IntersectResult); - void reconstructLoop(std::vector<const MachineBasicBlock*> &SB); - void fixBranches(std::vector<std::vector<MachineBasicBlock*> > &prologues, - std::vector<std::vector<BasicBlock*> > &llvm_prologues, - std::vector<MachineBasicBlock*> &machineKernelBB, - std::vector<BasicBlock*> &llvmKernelBB, - std::vector<std::vector<MachineBasicBlock*> > &epilogues, - std::vector<std::vector<BasicBlock*> > &llvm_epilogues, - std::vector<const MachineBasicBlock*> &SB, - std::map<const MachineBasicBlock*, Value*> &sideExits); - - void writePrologues(std::vector<std::vector<MachineBasicBlock *> > &prologues, - std::vector<const MachineBasicBlock*> &origBB, - std::vector<std::vector<BasicBlock*> > &llvm_prologues, - std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, - std::map<Value*, std::map<int, Value*> > &newValues, - std::map<Value*, MachineBasicBlock*> &newValLocation); - - void writeKernel(std::vector<BasicBlock*> &llvmBB, std::vector<MachineBasicBlock*> &machineBB, - std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, - std::map<Value*, std::map<int, Value*> > &newValues, - std::map<Value*, MachineBasicBlock*> &newValLocation, - std::map<Value*, std::map<int, Value*> > &kernelPHIs); - - void removePHIs(std::vector<const MachineBasicBlock*> &SB, - std::vector<std::vector<MachineBasicBlock*> > &prologues, - std::vector<std::vector<MachineBasicBlock*> > &epilogues, - std::vector<MachineBasicBlock*> &kernelBB, - std::map<Value*, MachineBasicBlock*> &newValLocation); - - void writeEpilogues(std::vector<std::vector<MachineBasicBlock*> > &epilogues, - std::vector<const MachineBasicBlock*> &origSB, - std::vector<std::vector<BasicBlock*> > &llvm_epilogues, - std::map<const Value*, std::pair<const MachineInstr*, int> > &valuesToSave, - std::map<Value*, std::map<int, Value*> > &newValues, - std::map<Value*, MachineBasicBlock*> &newValLocation, - std::map<Value*, std::map<int, Value*> > &kernelPHIs); - - void writeSideExits(std::vector<std::vector<MachineBasicBlock *> > &prologues, - std::vector<std::vector<BasicBlock*> > &llvm_prologues, - std::vector<std::vector<MachineBasicBlock *> > &epilogues, - std::vector<std::vector<BasicBlock*> > &llvm_epilogues, - std::map<const MachineBasicBlock*, Value*> &sideExits, - std::map<MachineBasicBlock*, std::vector<std::pair<MachineInstr*, int> > > &instrsMovedDown, - std::vector<const MachineBasicBlock*> &SB, - std::vector<MachineBasicBlock*> &kernelMBBs, - std::map<MachineBasicBlock*, int> branchStage); - - public: - ModuloSchedulingSBPass(TargetMachine &targ) : target(targ) {} - virtual bool runOnFunction(Function &F); - virtual const char* getPassName() const { return "ModuloScheduling-SuperBlock"; } - - - // getAnalysisUsage - virtual void getAnalysisUsage(AnalysisUsage &AU) const { - /// HACK: We don't actually need scev, but we have - /// to say we do so that the pass manager does not delete it - /// before we run. - AU.addRequired<LoopInfo>(); - AU.addRequired<ScalarEvolution>(); - AU.addRequired<DependenceAnalyzer>(); - } - }; -} -#endif |