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authorChris Lattner <sabre@nondot.org>2004-02-29 00:27:00 +0000
committerChris Lattner <sabre@nondot.org>2004-02-29 00:27:00 +0000
commitb1862e4d3b5fed38c17e04b4e626c8872f6b7dd5 (patch)
tree799bbe860fad8581f92f453506e789e4debf52c8 /llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
parentfa63580517628ba030e4ed67e273883b09c4fdf4 (diff)
downloadbcm5719-llvm-b1862e4d3b5fed38c17e04b4e626c8872f6b7dd5.tar.gz
bcm5719-llvm-b1862e4d3b5fed38c17e04b4e626c8872f6b7dd5.zip
Add an instruction selector capable of selecting 'ret void'
llvm-svn: 11973
Diffstat (limited to 'llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp')
-rw-r--r--llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp11
1 files changed, 10 insertions, 1 deletions
diff --git a/llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp b/llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
index 15401b103e6..f9a499dca43 100644
--- a/llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
+++ b/llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
@@ -40,10 +40,19 @@ SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
///
bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
std::ostream &Out) {
- // <insert instruction selector passes here>
+ PM.add(createSparcV8SimpleInstructionSelector(*this));
+
+ // Print machine instructions as they are created.
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
// <insert assembly code output passes here>
+
+ // This is not a correct asm writer by any means, but at least we see what we
+ // are producing.
+ PM.add(createMachineFunctionPrinterPass(&Out));
+
PM.add(createMachineCodeDeleter());
return false;
}
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