I think that V8 should coallesce registers, don't you?

llvm-svn: 15192

1 files changed, 19 insertions, 0 deletions

diff --git a/llvm/lib/Target/SparcV8/SparcV8InstrInfo.cpp b/llvm/lib/Target/SparcV8/SparcV8InstrInfo.cpp
index b9ce21cf70f..64e225faf21 100644
--- a/llvm/lib/Target/SparcV8/SparcV8InstrInfo.cpp
+++ b/llvm/lib/Target/SparcV8/SparcV8InstrInfo.cpp
@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "SparcV8InstrInfo.h"
+#include "SparcV8.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "SparcV8GenInstrInfo.inc"
 using namespace llvm;
@@ -20,3 +21,21 @@ SparcV8InstrInfo::SparcV8InstrInfo()
   : TargetInstrInfo(SparcV8Insts, sizeof(SparcV8Insts)/sizeof(SparcV8Insts[0])){
 }
 
+/// Return true if the instruction is a register to register move and
+/// leave the source and dest operands in the passed parameters.
+///
+bool SparcV8InstrInfo::isMoveInstr(const MachineInstr &MI,
+                                   unsigned &SrcReg, unsigned &DstReg) const {
+  if (MI.getOpcode() == V8::ORrr) {
+    if (MI.getOperand(1).getReg() == V8::G0) {  // X = or G0, Y -> X = Y
+      DstReg = MI.getOperand(0).getReg();
+      SrcReg = MI.getOperand(2).getReg();
+    }
+    return true;
+  } else if (MI.getOpcode() == V8::FMOVS) {
+    SrcReg = MI.getOperand(1).getReg();
+    DstReg = MI.getOperand(0).getReg();
+    return true;
+  }
+  return false;
+}