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| author | Chris Lattner <sabre@nondot.org> | 2005-12-16 07:10:02 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-12-16 07:10:02 +0000 |
| commit | 68d064a3a65e7180cb2fb6529f6b2ab0a94fc15d (patch) | |
| tree | 9c117eeeb01da5f5be7b559325073522ed0cad9c /llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp | |
| parent | 1e777082a02273d3271c82ebba5f7a530e979bc3 (diff) | |
| download | bcm5719-llvm-68d064a3a65e7180cb2fb6529f6b2ab0a94fc15d.tar.gz bcm5719-llvm-68d064a3a65e7180cb2fb6529f6b2ab0a94fc15d.zip | |
Autogenerate asmprinter for F3_2 instructions
llvm-svn: 24741
Diffstat (limited to 'llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp')
| -rw-r--r-- | llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp b/llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp index cedbe3fed09..8867275d619 100644 --- a/llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp +++ b/llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp @@ -422,40 +422,6 @@ void SparcV8AsmPrinter::printOperand(const MachineInstr *MI, int opNum) { if (CloseParen) O << ")"; } -static bool isLoadInstruction (const MachineInstr *MI) { - switch (MI->getOpcode ()) { - case V8::LDSB: - case V8::LDSH: - case V8::LDUB: - case V8::LDUH: - case V8::LD: - case V8::LDD: - case V8::LDFrr: - case V8::LDFri: - case V8::LDDFrr: - case V8::LDDFri: - return true; - default: - return false; - } -} - -static bool isStoreInstruction (const MachineInstr *MI) { - switch (MI->getOpcode ()) { - case V8::STB: - case V8::STH: - case V8::ST: - case V8::STD: - case V8::STFrr: - case V8::STFri: - case V8::STDFrr: - case V8::STDFri: - return true; - default: - return false; - } -} - static bool isPseudoInstruction (const MachineInstr *MI) { switch (MI->getOpcode ()) { case V8::PHI: @@ -507,23 +473,6 @@ void SparcV8AsmPrinter::printMachineInstruction(const MachineInstr *MI) { O << Desc.Name << " "; - // Printing memory instructions is a special case. - // for loads: %dest = op %base, offset --> op [%base + offset], %dest - // for stores: op %base, offset, %src --> op %src, [%base + offset] - if (isLoadInstruction (MI)) { - printBaseOffsetPair (MI, 1); - O << ", "; - printOperand (MI, 0); - O << "\n"; - return; - } else if (isStoreInstruction (MI)) { - printOperand (MI, 2); - O << ", "; - printBaseOffsetPair (MI, 0); - O << "\n"; - return; - } - // print non-immediate, non-register-def operands // then print immediate operands // then print register-def operands. |

