There shalt be only one "immediate" operand type!

llvm-svn: 28099

2 files changed, 5 insertions, 7 deletions

diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
index 2d81bbd6700..d95ca9c1f97 100644
--- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -153,8 +153,7 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
       O << "%reg" << MO.getReg();
     break;
 
-  case MachineOperand::MO_SignExtendedImmed:
-  case MachineOperand::MO_UnextendedImmed:
+  case MachineOperand::MO_Immediate:
     O << (int)MO.getImmedValue();
     break;
   case MachineOperand::MO_MachineBasicBlock:
@@ -192,8 +191,7 @@ void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
   if (OpTy == MachineOperand::MO_VirtualRegister &&
       MI->getOperand(opNum+1).getReg() == SP::G0)
     return;   // don't print "+%g0"
-  if ((OpTy == MachineOperand::MO_SignExtendedImmed ||
-       OpTy == MachineOperand::MO_UnextendedImmed) &&
+  if (OpTy == MachineOperand::MO_Immediate &&
       MI->getOperand(opNum+1).getImmedValue() == 0)
     return;   // don't print "+0"
   
diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
index 75c3378cbb6..d72ca74516b 100644
--- a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -111,7 +111,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
   if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
     Size = -Size;
   if (Size)
-    BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addSImm(Size);
+    BuildMI(MBB, I, SP::ADDri, 2, SP::O6).addReg(SP::O6).addImm(Size);
   MBB.erase(I);
 }
 
@@ -136,7 +136,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
     // If the offset is small enough to fit in the immediate field, directly
     // encode it.
     MI.SetMachineOperandReg(i, SP::I6);
-    MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed,Offset);
+    MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate, Offset);
   } else {
     // Otherwise, emit a G1 = SETHI %hi(offset).  FIXME: it would be better to 
     // scavenge a register here instead of reserving G1 all of the time.
@@ -147,7 +147,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
             SP::G1).addReg(SP::G1).addReg(SP::I6);
     // Insert: G1+%lo(offset) into the user.
     MI.SetMachineOperandReg(i, SP::G1);
-    MI.SetMachineOperandConst(i+1, MachineOperand::MO_SignExtendedImmed,
+    MI.SetMachineOperandConst(i+1, MachineOperand::MO_Immediate,
                               Offset & ((1 << 10)-1));
   }
 }