summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Sparc
diff options
context:
space:
mode:
authorMisha Brukman <brukman+llvm@gmail.com>2003-05-30 20:00:13 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2003-05-30 20:00:13 +0000
commitc1830a472a96a4dee4c04dc3b5f749dd42f0a8dd (patch)
treea6d56a98160385e25d9ba42a4901886fe0617deb /llvm/lib/Target/Sparc
parentfdb2f4b7cd429d2aeba83efe19caec033ff0c3d4 (diff)
downloadbcm5719-llvm-c1830a472a96a4dee4c04dc3b5f749dd42f0a8dd.tar.gz
bcm5719-llvm-c1830a472a96a4dee4c04dc3b5f749dd42f0a8dd.zip
Make LLI behave just like LLC with regard to the compile passes it uses.
llvm-svn: 6444
Diffstat (limited to 'llvm/lib/Target/Sparc')
-rw-r--r--llvm/lib/Target/Sparc/Sparc.cpp15
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/Sparc/Sparc.cpp b/llvm/lib/Target/Sparc/Sparc.cpp
index 1ca04a6abad..e79906de9ab 100644
--- a/llvm/lib/Target/Sparc/Sparc.cpp
+++ b/llvm/lib/Target/Sparc/Sparc.cpp
@@ -208,8 +208,20 @@ bool UltraSparc::addPassesToJITCompile(PassManager &PM) {
//so %fp+offset-8 and %fp+offset-16 are empty slots now!
PM.add(createStackSlotsPass(*this));
+ // Specialize LLVM code for this target machine and then
+ // run basic dataflow optimizations on LLVM code.
+ if (!DisablePreSelect) {
+ PM.add(createPreSelectionPass(*this));
+ PM.add(createReassociatePass());
+ PM.add(createLICMPass());
+ PM.add(createGCSEPass());
+ }
+
PM.add(createInstructionSelectionPass(*this));
+ if (!DisableSched)
+ PM.add(createInstructionSchedulingWithSSAPass(*this));
+
// new pass: convert Value* in MachineOperand to an unsigned register
// this brings it in line with what the X86 JIT's RegisterAllocator expects
//PM.add(createAddRegNumToValuesPass());
@@ -217,5 +229,8 @@ bool UltraSparc::addPassesToJITCompile(PassManager &PM) {
PM.add(getRegisterAllocator(*this));
PM.add(getPrologEpilogInsertionPass());
+ if (!DisablePeephole)
+ PM.add(createPeepholeOptsPass(*this));
+
return false; // success!
}
OpenPOWER on IntegriCloud