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authorRuchira Sasanka <sasanka@students.uiuc.edu>2001-11-14 15:35:13 +0000
committerRuchira Sasanka <sasanka@students.uiuc.edu>2001-11-14 15:35:13 +0000
commitb8be6f68560aeb11f00565befd6f4a4e0f176437 (patch)
tree68bbcf6c21b767850d7f5e48d5c531a356e6c5f5 /llvm/lib/Target/Sparc
parentf1acecccb62077b89a562320eb1db9beacc4538c (diff)
downloadbcm5719-llvm-b8be6f68560aeb11f00565befd6f4a4e0f176437.tar.gz
bcm5719-llvm-b8be6f68560aeb11f00565befd6f4a4e0f176437.zip
Added M_PSEUDO_FLAG for SETX .. instr
llvm-svn: 1301
Diffstat (limited to 'llvm/lib/Target/Sparc')
-rw-r--r--llvm/lib/Target/Sparc/SparcInstr.def6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstr.def b/llvm/lib/Target/Sparc/SparcInstr.def
index 2e8d20b485d..89322ff1e34 100644
--- a/llvm/lib/Target/Sparc/SparcInstr.def
+++ b/llvm/lib/Target/Sparc/SparcInstr.def
@@ -44,9 +44,9 @@ I(NOP, "nop", 0, -1, 0, false, 0, 1, SPARC_NONE, M_NOP_FLAG)
// Synthetic SPARC assembly opcodes for setting a register to a constant.
// Max immediate constant should be ignored for both these instructions.
// Use a latency > 1 since this may generate as many as 3 instructions.
-I(SETSW, "setsw", 2, 1, 0, true , 0, 2, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG)
-I(SETUW, "setuw", 2, 1, 0, false, 0, 2, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG)
-I(SETX, "setx", 3, 2, 0, true, 0, 5, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG)
+I(SETSW, "setsw", 2, 1, 0, true , 0, 2, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG | M_PSEUDO_FLAG )
+I(SETUW, "setuw", 2, 1, 0, false, 0, 2, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG | M_PSEUDO_FLAG )
+I(SETX, "setx", 3, 2, 0, true, 0, 5, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG | M_PSEUDO_FLAG )
// Set high-order bits of register and clear low-order bits
I(SETHI, "sethi", 2, 1, B22, false, 0, 1, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG)
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