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| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-05-31 23:45:26 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-05-31 23:45:26 +0000 |
| commit | b1a4d9da3b7d48c40e6abee2acc9f6324dad7f84 (patch) | |
| tree | 9c40c9ccfbe5f8ef21d580220db6d0f82ec1764d /llvm/lib/Target/Sparc | |
| parent | ee9143acf503e487f62423594ce52525e28ced9f (diff) | |
| download | bcm5719-llvm-b1a4d9da3b7d48c40e6abee2acc9f6324dad7f84.tar.gz bcm5719-llvm-b1a4d9da3b7d48c40e6abee2acc9f6324dad7f84.zip | |
Make SubRegIndex size mandatory, following r183020.
This also makes TableGen able to compute sizes/offsets of synthesized
indices representing tuples.
llvm-svn: 183061
Diffstat (limited to 'llvm/lib/Target/Sparc')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcRegisterInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.td b/llvm/lib/Target/Sparc/SparcRegisterInfo.td index d1edcb6de1f..b57fd3ddafb 100644 --- a/llvm/lib/Target/Sparc/SparcRegisterInfo.td +++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.td @@ -21,8 +21,8 @@ class SparcCtrlReg<string n>: Register<n> { } let Namespace = "SP" in { -def sub_even : SubRegIndex; -def sub_odd : SubRegIndex; +def sub_even : SubRegIndex<32>; +def sub_odd : SubRegIndex<32, 32>; } // Registers are identified with 5-bit ID numbers. |
