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author | James Y Knight <jyknight@google.com> | 2016-10-05 20:54:17 +0000 |
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committer | James Y Knight <jyknight@google.com> | 2016-10-05 20:54:17 +0000 |
commit | b0a473aaf84a5c0fca4a0292341de313bece37fc (patch) | |
tree | 640fcf6689e934ef7213976993000b8e77db7563 /llvm/lib/Target/Sparc | |
parent | 9c69bc9776110df35cb538d6709bf2f20a98b35c (diff) | |
download | bcm5719-llvm-b0a473aaf84a5c0fca4a0292341de313bece37fc.tar.gz bcm5719-llvm-b0a473aaf84a5c0fca4a0292341de313bece37fc.zip |
[Sparc] Implement UMUL_LOHI and SMUL_LOHI instead of MULHS/MULHU/MUL.
This is what the instruction-set actually provides, and the default
expansions of the others into the lohi opcodes are good.
llvm-svn: 283381
Diffstat (limited to 'llvm/lib/Target/Sparc')
-rw-r--r-- | llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp | 13 | ||||
-rw-r--r-- | llvm/lib/Target/Sparc/SparcISelLowering.cpp | 7 | ||||
-rw-r--r-- | llvm/lib/Target/Sparc/SparcInstrInfo.td | 4 |
3 files changed, 6 insertions, 18 deletions
diff --git a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp index 77d44ceba6f..a16cd32484a 100644 --- a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp +++ b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp @@ -363,19 +363,6 @@ void SparcDAGToDAGISel::Select(SDNode *N) { CurDAG->SelectNodeTo(N, Opcode, MVT::i32, DivLHS, DivRHS, TopPart); return; } - case ISD::MULHU: - case ISD::MULHS: { - // FIXME: Handle mul by immediate. - SDValue MulLHS = N->getOperand(0); - SDValue MulRHS = N->getOperand(1); - unsigned Opcode = N->getOpcode() == ISD::MULHU ? SP::UMULrr : SP::SMULrr; - SDNode *Mul = - CurDAG->getMachineNode(Opcode, dl, MVT::i32, MVT::i32, MulLHS, MulRHS); - SDValue ResultHigh = SDValue(Mul, 1); - ReplaceUses(SDValue(N, 0), ResultHigh); - CurDAG->RemoveDeadNode(N); - return; - } } SelectCode(N); diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp index 5e0fe674707..d6abb554e02 100644 --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -1685,9 +1685,10 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); - // FIXME: Sparc provides these multiplies, but we don't have them yet. - setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); - setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); + // Expands to [SU]MUL_LOHI. + setOperationAction(ISD::MULHU, MVT::i32, Expand); + setOperationAction(ISD::MULHS, MVT::i32, Expand); + setOperationAction(ISD::MUL, MVT::i32, Expand); if (Subtarget->is64Bit()) { setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td b/llvm/lib/Target/Sparc/SparcInstrInfo.td index 00d22cb286d..5a19c624abb 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.td +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td @@ -734,8 +734,8 @@ let Defs = [ICC], rd = 0 in { // Section B.18 - Multiply Instructions, p. 113 let Defs = [Y] in { - defm UMUL : F3_12np<"umul", 0b001010, IIC_iu_umul>; - defm SMUL : F3_12 <"smul", 0b001011, mul, IntRegs, i32, simm13Op, IIC_iu_smul>; + defm UMUL : F3_12<"umul", 0b001010, umullohi, IntRegs, i32, simm13Op, IIC_iu_umul>; + defm SMUL : F3_12<"smul", 0b001011, smullohi, IntRegs, i32, simm13Op, IIC_iu_smul>; } let Defs = [Y, ICC] in { |