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authorRuchira Sasanka <sasanka@students.uiuc.edu>2001-09-19 22:40:51 +0000
committerRuchira Sasanka <sasanka@students.uiuc.edu>2001-09-19 22:40:51 +0000
commitebd284dfe944f8e8bb403e3e20ecbf0678ed339f (patch)
treebc9e417b9fccfcbd8b334085f6d947d966813016 /llvm/lib/Target/Sparc/SparcRegInfo.cpp
parent72727bf358852307a5ed46806c8e92e111a253b4 (diff)
downloadbcm5719-llvm-ebd284dfe944f8e8bb403e3e20ecbf0678ed339f.tar.gz
bcm5719-llvm-ebd284dfe944f8e8bb403e3e20ecbf0678ed339f.zip
-- fixed a ret val bug
llvm-svn: 652
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcRegInfo.cpp')
-rw-r--r--llvm/lib/Target/Sparc/SparcRegInfo.cpp19
1 files changed, 18 insertions, 1 deletions
diff --git a/llvm/lib/Target/Sparc/SparcRegInfo.cpp b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
index ec4868b938d..8254b00a5b0 100644
--- a/llvm/lib/Target/Sparc/SparcRegInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegInfo.cpp
@@ -343,8 +343,25 @@ void UltraSparcRegInfo::colorRetArg(vector<const Instruction *> &
MachineCodeForVMInstr & MInstVec = RetI->getMachineInstrVec();
MachineCodeForVMInstr::const_iterator MIIt = MInstVec.begin();
+
+ /*
+ for( ; MIIt != MInstVec.end() &&
+ !getUltraSparcInfo().getInstrInfo().isReturn((*MIIt)->getOpCode());
+ ++MIIt ) {
+
+ cout << "Inst = "<< TargetInstrDescriptors[(*MIIt)->getOpCode()].opCodeString << endl;
+
+
+ }
+ assert((MIIt != MInstVec.end()) &&"No return machine instruction found");
+
+ */
+
+
assert(getUltraSparcInfo().getInstrInfo().isReturn((*MIIt)->getOpCode())
- && "First machine instruction is not a RET Machine Instr");
+ && "First machine inst is not a RETURN Machine Instr");
+
+
// RET machine isntruction
const MachineInstr *const RetMI = *MIIt;
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