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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2002-07-08 23:15:32 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2002-07-08 23:15:32 +0000 |
| commit | 7228f0c40476ea84f010de6a33c82e168609874c (patch) | |
| tree | 99389e6862577793083c6de2a5dab51a92f9364e /llvm/lib/Target/Sparc/SparcRegInfo.cpp | |
| parent | 1dfb4079b7c2afd544da837a4cad68c9126b9a40 (diff) | |
| download | bcm5719-llvm-7228f0c40476ea84f010de6a33c82e168609874c.tar.gz bcm5719-llvm-7228f0c40476ea84f010de6a33c82e168609874c.zip | |
Significant changes to correctly spill CC registers and to correctly
handle conditional move instructions:
-- cpMem<->Reg functions now support CC registers (int and FP) correctly.
-- Scratch registers must be explicitly provided to cpMem<->Reg when
needed, since CC regs need one to be copied to/from memory.
-- CC regs are saved to a scratch register instead of stack.
-- All regs used by a instruction are now recorded in MachineInstr::regsUsed,
since regs used to save values *across* an instruction are not obvious
either from the operands or from the LiveVar sets.
-- An (explicit or implicit) operand may now be both a def and a use.
This is needed for conditional move operations.
So an operand may need spill code both before and after the instruction.
-- class MachineCodeForBasicBlock is now an annotation on BasicBlock.
llvm-svn: 2833
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcRegInfo.cpp')
0 files changed, 0 insertions, 0 deletions

