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| author | Misha Brukman <brukman+llvm@gmail.com> | 2003-05-30 18:06:10 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2003-05-30 18:06:10 +0000 |
| commit | f6e4dce74c66a03ae4fa8db4ef55b90cc68092c4 (patch) | |
| tree | b8fbe2c0635b9d00e4e3de52141953ad936a966b /llvm/lib/Target/Sparc/SparcRegClassInfo.cpp | |
| parent | e996d0a3cde8fc314699cd32f943124e9be729f6 (diff) | |
| download | bcm5719-llvm-f6e4dce74c66a03ae4fa8db4ef55b90cc68092c4.tar.gz bcm5719-llvm-f6e4dce74c66a03ae4fa8db4ef55b90cc68092c4.zip | |
Because the format of the shift instructions is `shift r, shcnt, r', the
instructions of format 3.12 and 3.13 cannot inherit from F3rdrs1, because that
implies that the two registers are the first two parameters to the instruction.
Thus I made the instructions inherit from F3rd again, and manually added an rs1
field AFTER the shcnt field in the instruction, which maps to the appropriate
place in the instruction.
The other changes are just elimination of unnecessary spaces.
llvm-svn: 6437
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcRegClassInfo.cpp')
0 files changed, 0 insertions, 0 deletions
