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| author | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-02-23 02:46:52 +0000 |
|---|---|---|
| committer | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-02-23 02:46:52 +0000 |
| commit | 6307eb551822a925c3a39ae1c814e4b46893a4b4 (patch) | |
| tree | 08715dd004161c2809f203f3c19161af6261cfa3 /llvm/lib/Target/Sparc/SparcInstrInfo.cpp | |
| parent | b3613fce19b0fd154d38b044196357afdc335f8d (diff) | |
| download | bcm5719-llvm-6307eb551822a925c3a39ae1c814e4b46893a4b4.tar.gz bcm5719-llvm-6307eb551822a925c3a39ae1c814e4b46893a4b4.zip | |
CodeGen: TII: Take MachineInstr& in predicate API, NFC
Change TargetInstrInfo API to take `MachineInstr&` instead of
`MachineInstr*` in the functions related to predicated instructions
(I'll try to come back later and get some of the rest). All of these
functions require non-null parameters already, so references are more
clear. As a bonus, this happens to factor away a host of implicit
iterator => pointer conversions.
No functionality change intended.
llvm-svn: 261605
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcInstrInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp index 05006ac5772..0a123185ca6 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp @@ -148,7 +148,7 @@ bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, if (I == MBB.end()) return false; - if (!isUnpredicatedTerminator(I)) + if (!isUnpredicatedTerminator(*I)) return false; // Get the last instruction in the block. @@ -156,7 +156,7 @@ bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, unsigned LastOpc = LastInst->getOpcode(); // If there is only one terminator instruction, process it. - if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { + if (I == MBB.begin() || !isUnpredicatedTerminator(*--I)) { if (isUncondBranchOpcode(LastOpc)) { TBB = LastInst->getOperand(0).getMBB(); return false; @@ -180,7 +180,7 @@ bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, LastInst->eraseFromParent(); LastInst = SecondLastInst; LastOpc = LastInst->getOpcode(); - if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { + if (I == MBB.begin() || !isUnpredicatedTerminator(*--I)) { // Return now the only terminator is an unconditional branch. TBB = LastInst->getOperand(0).getMBB(); return false; @@ -192,7 +192,7 @@ bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, } // If there are three terminators, we don't know what sort of block this is. - if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(--I)) + if (SecondLastInst && I != MBB.begin() && isUnpredicatedTerminator(*--I)) return true; // If the block ends with a B and a Bcc, handle it. |
