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authorChris Dewhurst <chris.dewhurst@lero.ie>2016-10-10 08:53:06 +0000
committerChris Dewhurst <chris.dewhurst@lero.ie>2016-10-10 08:53:06 +0000
commit850131213f1cb52653f7ff092cf48a23e04bab24 (patch)
treef4d8657b3f5abf7ae3e103919c20d069e3b09236 /llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
parent30cd7341d07a94b78864355c64103d41bdbde910 (diff)
downloadbcm5719-llvm-850131213f1cb52653f7ff092cf48a23e04bab24.tar.gz
bcm5719-llvm-850131213f1cb52653f7ff092cf48a23e04bab24.zip
This pass, fixing an erratum in some LEON 2 processors ensures that the SDIV instruction is not issued, but replaced by SDIVcc instead, which does not exhibit the error. Unit test included.
Differential Review: https://reviews.llvm.org/D24660 llvm-svn: 283727
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp')
-rw-r--r--llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index a16cd32484a..c36e75d1b07 100644
--- a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -360,6 +360,12 @@ void SparcDAGToDAGISel::Select(SDNode *N) {
// FIXME: Handle div by immediate.
unsigned Opcode = N->getOpcode() == ISD::SDIV ? SP::SDIVrr : SP::UDIVrr;
+ // SDIV is a hardware erratum on some LEON2 processors. Replace it with SDIVcc here.
+ if (((SparcTargetMachine&)TM).getSubtargetImpl()->performSDIVReplace()
+ &&
+ Opcode == SP::SDIVrr) {
+ Opcode = SP::SDIVCCrr;
+ }
CurDAG->SelectNodeTo(N, Opcode, MVT::i32, DivLHS, DivRHS, TopPart);
return;
}
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