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| author | Daniel Sanders <daniel_l_sanders@apple.com> | 2016-11-19 13:05:44 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2016-11-19 13:05:44 +0000 |
| commit | 72db2a390a43e6aa50f4653f99ad3085731f06c1 (patch) | |
| tree | 8513afb8caaa0febac39836470418c7194f23efe /llvm/lib/Target/Sparc/Sparc.h | |
| parent | ca89f3a19bd493835e51aa033c061b621de7ec1d (diff) | |
| download | bcm5719-llvm-72db2a390a43e6aa50f4653f99ad3085731f06c1.tar.gz bcm5719-llvm-72db2a390a43e6aa50f4653f99ad3085731f06c1.zip | |
Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
Summary:
* ARM is omitted from this patch because this check appears to expose bugs in this target.
* Mips is omitted from this patch because this check either detects bugs or deliberate
emission of instructions that don't satisfy their predicates. One deliberate
use is the SYNC instruction where the version with an operand is correctly
defined as requiring MIPS32 while the version without an operand is defined
as an alias of 'SYNC 0' and requires MIPS2.
* X86 is omitted from this patch because it doesn't use the tablegen-erated
MCCodeEmitter infrastructure.
Patches for ARM and Mips will follow.
Depends on D25617
Reviewers: tstellarAMD, jmolloy
Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits
Differential Revision: https://reviews.llvm.org/D25618
llvm-svn: 287439
Diffstat (limited to 'llvm/lib/Target/Sparc/Sparc.h')
0 files changed, 0 insertions, 0 deletions
