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authorRuchira Sasanka <sasanka@students.uiuc.edu>2001-09-15 19:11:31 +0000
committerRuchira Sasanka <sasanka@students.uiuc.edu>2001-09-15 19:11:31 +0000
commit970886e7388c6b90a3fa42f97bd6381b914b34a2 (patch)
tree3b906814fb97c95d9a210dc256919a4d367c805a /llvm/lib/Target/Sparc/Sparc.cpp
parent86b2ad4b7c394a6682182a78dc488055ee7c6912 (diff)
downloadbcm5719-llvm-970886e7388c6b90a3fa42f97bd6381b914b34a2.tar.gz
bcm5719-llvm-970886e7388c6b90a3fa42f97bd6381b914b34a2.zip
modified printing of debug messages
llvm-svn: 593
Diffstat (limited to 'llvm/lib/Target/Sparc/Sparc.cpp')
-rw-r--r--llvm/lib/Target/Sparc/Sparc.cpp27
1 files changed, 1 insertions, 26 deletions
diff --git a/llvm/lib/Target/Sparc/Sparc.cpp b/llvm/lib/Target/Sparc/Sparc.cpp
index 2070af7a7aa..3e9998004df 100644
--- a/llvm/lib/Target/Sparc/Sparc.cpp
+++ b/llvm/lib/Target/Sparc/Sparc.cpp
@@ -90,32 +90,7 @@ UltraSparcSchedInfo::initializeResources()
-//---------------------------------------------------------------------------
-// class UltraSparcRegInfo
-//
-// Purpose:
-// This class provides info about sparc register classes.
-//--------------------------------------------------------------------------
-
-#if 0
-UltraSparcRegInfo::UltraSparcRegInfo(const UltraSparc *const USI ) :
- UltraSparcInfo(USI),
- NumOfIntArgRegs(6),
- NumOfFloatArgRegs(6)
- {
- MachineRegClassArr.push_back( new SparcIntRegClass(IntRegClassID) );
- MachineRegClassArr.push_back( new SparcFloatRegClass(FloatRegClassID) );
- MachineRegClassArr.push_back( new SparcIntCCRegClass(IntCCRegClassID) );
- MachineRegClassArr.push_back( new SparcFloatCCRegClass(FloatCCRegClassID));
-
- assert( SparcFloatRegOrder::StartOfNonVolatileRegs == 6 &&
- "6 Float regs are used for float arg passing");
- }
-
- // ***** TODO insert deletes for reg classes
-UltraSparcRegInfo::~UltraSparcRegInfo(void) { } // empty destructor
-#endif
//---------------------------------------------------------------------------
// UltraSparcRegInfo
@@ -427,7 +402,7 @@ UltraSparc::UltraSparc() : TargetMachine("UltraSparc-Native"),
optSizeForSubWordData = 4;
minMemOpWordSize = 8;
maxAtomicMemOpWordSize = 8;
- zeroRegNum = 0; // %g0 always gives 0 on Sparc
+ zeroRegNum = RegInfo.getZeroReg(); // %g0 always gives 0 on Sparc
}
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