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| author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-03-02 09:46:56 +0000 |
|---|---|---|
| committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-03-02 09:46:56 +0000 |
| commit | b745e67a64e617d4f3f3e804014a4ef9775463b8 (patch) | |
| tree | 8d634663f06c9b09b39882ac58acec441d2872fd /llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp | |
| parent | 5de228b28716ff0bb2f29b45e96334b535457fe7 (diff) | |
| download | bcm5719-llvm-b745e67a64e617d4f3f3e804014a4ef9775463b8.tar.gz bcm5719-llvm-b745e67a64e617d4f3f3e804014a4ef9775463b8.zip | |
[SparcV9] Adds support for branch on integer register instructions (BPr) and conditional moves on integer register (MOVr/FMOVr).
llvm-svn: 202628
Diffstat (limited to 'llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp')
| -rw-r--r-- | llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp index f6c58165497..d0621c1c795 100644 --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp @@ -39,6 +39,12 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { case Sparc::fixup_sparc_br19: return (Value >> 2) & 0x7ffff; + case Sparc::fixup_sparc_br16_2: + return (Value >> 2) & 0xc000; + + case Sparc::fixup_sparc_br16_14: + return (Value >> 2) & 0x3fff; + case Sparc::fixup_sparc_pc22: case Sparc::fixup_sparc_got22: case Sparc::fixup_sparc_tls_gd_hi22: @@ -106,6 +112,8 @@ namespace { { "fixup_sparc_call30", 2, 30, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_br22", 10, 22, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_br19", 13, 19, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_sparc_br16_2", 10, 2, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_sparc_br16_14", 18, 14, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_hi22", 10, 22, 0 }, { "fixup_sparc_lo10", 22, 10, 0 }, { "fixup_sparc_h44", 10, 22, 0 }, |
