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author | Daniel Cederman <cederman@gaisler.com> | 2018-06-11 05:50:08 +0000 |
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committer | Daniel Cederman <cederman@gaisler.com> | 2018-06-11 05:50:08 +0000 |
commit | 33f67a256b5eafab7d73c644875c8c6a97d9dbdc (patch) | |
tree | 36a7e8e614b5474c3120df1952399080af3f62e2 /llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp | |
parent | b60532f89af6672ef86b7254df1c7226243497f3 (diff) | |
download | bcm5719-llvm-33f67a256b5eafab7d73c644875c8c6a97d9dbdc.tar.gz bcm5719-llvm-33f67a256b5eafab7d73c644875c8c6a97d9dbdc.zip |
[Sparc] Add support for 13-bit PIC
Summary: When compiling with -fpic, in contrast to -fPIC, use only the
immediate field to index into the GOT. This saves space if the GOT is
known to be small. The linker will warn if the GOT is too large for
this method.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: brad, fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D47136
llvm-svn: 334383
Diffstat (limited to 'llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp')
-rw-r--r-- | llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp index 4b6c1de7d85..5f5e2ef7d45 100644 --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp @@ -54,6 +54,10 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { case Sparc::fixup_sparc_hi22: return (Value >> 10) & 0x3fffff; + case Sparc::fixup_sparc_got13: + case Sparc::fixup_sparc_13: + return Value & 0x1fff; + case Sparc::fixup_sparc_pc10: case Sparc::fixup_sparc_got10: case Sparc::fixup_sparc_tls_gd_lo10: @@ -120,6 +124,7 @@ namespace { { "fixup_sparc_br19", 13, 19, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_br16_2", 10, 2, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_br16_14", 18, 14, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_sparc_13", 19, 13, 0 }, { "fixup_sparc_hi22", 10, 22, 0 }, { "fixup_sparc_lo10", 22, 10, 0 }, { "fixup_sparc_h44", 10, 22, 0 }, @@ -131,6 +136,7 @@ namespace { { "fixup_sparc_pc10", 22, 10, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_got22", 10, 22, 0 }, { "fixup_sparc_got10", 22, 10, 0 }, + { "fixup_sparc_got13", 19, 13, 0 }, { "fixup_sparc_wplt30", 2, 30, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_tls_gd_hi22", 10, 22, 0 }, { "fixup_sparc_tls_gd_lo10", 22, 10, 0 }, @@ -159,6 +165,7 @@ namespace { { "fixup_sparc_br19", 0, 19, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_br16_2", 20, 2, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_br16_14", 0, 14, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_sparc_13", 0, 13, 0 }, { "fixup_sparc_hi22", 0, 22, 0 }, { "fixup_sparc_lo10", 0, 10, 0 }, { "fixup_sparc_h44", 0, 22, 0 }, @@ -170,6 +177,7 @@ namespace { { "fixup_sparc_pc10", 0, 10, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_got22", 0, 22, 0 }, { "fixup_sparc_got10", 0, 10, 0 }, + { "fixup_sparc_got13", 0, 13, 0 }, { "fixup_sparc_wplt30", 0, 30, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_sparc_tls_gd_hi22", 0, 22, 0 }, { "fixup_sparc_tls_gd_lo10", 0, 10, 0 }, |