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authorChris Dewhurst <chris.dewhurst@lero.ie>2016-09-09 14:16:51 +0000
committerChris Dewhurst <chris.dewhurst@lero.ie>2016-09-09 14:16:51 +0000
commitc59f7c745bc629d8a6ef22aa0c748e9216452851 (patch)
tree797f485f48495a838a771211f342574e45229468 /llvm/lib/Target/Sparc/LeonPasses.cpp
parent6368525eeaa4c0c3c5bbbe199f1afe997fb5d838 (diff)
downloadbcm5719-llvm-c59f7c745bc629d8a6ef22aa0c748e9216452851.tar.gz
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[Sparc][LEON] Removed the parts of the errata fixes implemented using inline assembly as this is not the desired behaviour for end-users. Small change to a unit test to implement this without requiring the inline assembly.
llvm-svn: 281047
Diffstat (limited to 'llvm/lib/Target/Sparc/LeonPasses.cpp')
-rw-r--r--llvm/lib/Target/Sparc/LeonPasses.cpp76
1 files changed, 0 insertions, 76 deletions
diff --git a/llvm/lib/Target/Sparc/LeonPasses.cpp b/llvm/lib/Target/Sparc/LeonPasses.cpp
index fe57ec7b677..46ae9ccc783 100644
--- a/llvm/lib/Target/Sparc/LeonPasses.cpp
+++ b/llvm/lib/Target/Sparc/LeonPasses.cpp
@@ -89,15 +89,6 @@ bool InsertNOPLoad::runOnMachineFunction(MachineFunction &MF) {
MachineBasicBlock::iterator NMBBI = std::next(MBBI);
BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP));
Modified = true;
- } else if (MI.isInlineAsm()) {
- // Look for an inline ld or ldf instruction.
- StringRef AsmString =
- MI.getOperand(InlineAsm::MIOp_AsmString).getSymbolName();
- if (AsmString.startswith_lower("ld")) {
- MachineBasicBlock::iterator NMBBI = std::next(MBBI);
- BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP));
- Modified = true;
- }
}
}
}
@@ -147,32 +138,6 @@ bool FixFSMULD::runOnMachineFunction(MachineFunction &MF) {
Reg1Index = MI.getOperand(0).getReg();
Reg2Index = MI.getOperand(1).getReg();
Reg3Index = MI.getOperand(2).getReg();
- } else if (MI.isInlineAsm()) {
- std::string AsmString(
- MI.getOperand(InlineAsm::MIOp_AsmString).getSymbolName());
- std::string FMULSOpCoode("fsmuld");
- std::transform(AsmString.begin(), AsmString.end(), AsmString.begin(),
- ::tolower);
- if (AsmString.find(FMULSOpCoode) ==
- 0) { // this is an inline FSMULD instruction
-
- unsigned StartOp = InlineAsm::MIOp_FirstOperand;
-
- // extracts the registers from the inline assembly instruction
- for (unsigned i = StartOp, e = MI.getNumOperands(); i != e; ++i) {
- const MachineOperand &MO = MI.getOperand(i);
- if (MO.isReg()) {
- if (Reg1Index == UNASSIGNED_INDEX)
- Reg1Index = MO.getReg();
- else if (Reg2Index == UNASSIGNED_INDEX)
- Reg2Index = MO.getReg();
- else if (Reg3Index == UNASSIGNED_INDEX)
- Reg3Index = MO.getReg();
- }
- if (Reg3Index != UNASSIGNED_INDEX)
- break;
- }
- }
}
if (Reg1Index != UNASSIGNED_INDEX && Reg2Index != UNASSIGNED_INDEX &&
@@ -262,31 +227,6 @@ bool ReplaceFMULS::runOnMachineFunction(MachineFunction &MF) {
Reg1Index = MI.getOperand(0).getReg();
Reg2Index = MI.getOperand(1).getReg();
Reg3Index = MI.getOperand(2).getReg();
- } else if (MI.isInlineAsm()) {
- std::string AsmString(
- MI.getOperand(InlineAsm::MIOp_AsmString).getSymbolName());
- std::string FMULSOpCoode("fmuls");
- std::transform(AsmString.begin(), AsmString.end(), AsmString.begin(),
- ::tolower);
- if (AsmString.find(FMULSOpCoode) ==
- 0) { // this is an inline FMULS instruction
- unsigned StartOp = InlineAsm::MIOp_FirstOperand;
-
- // extracts the registers from the inline assembly instruction
- for (unsigned i = StartOp, e = MI.getNumOperands(); i != e; ++i) {
- const MachineOperand &MO = MI.getOperand(i);
- if (MO.isReg()) {
- if (Reg1Index == UNASSIGNED_INDEX)
- Reg1Index = MO.getReg();
- else if (Reg2Index == UNASSIGNED_INDEX)
- Reg2Index = MO.getReg();
- else if (Reg3Index == UNASSIGNED_INDEX)
- Reg3Index = MO.getReg();
- }
- if (Reg3Index != UNASSIGNED_INDEX)
- break;
- }
- }
}
if (Reg1Index != UNASSIGNED_INDEX && Reg2Index != UNASSIGNED_INDEX &&
@@ -368,22 +308,6 @@ bool FixAllFDIVSQRT::runOnMachineFunction(MachineFunction &MF) {
MachineInstr &MI = *MBBI;
unsigned Opcode = MI.getOpcode();
- if (MI.isInlineAsm()) {
- std::string AsmString(
- MI.getOperand(InlineAsm::MIOp_AsmString).getSymbolName());
- std::string FSQRTDOpCode("fsqrtd");
- std::string FDIVDOpCode("fdivd");
- std::transform(AsmString.begin(), AsmString.end(), AsmString.begin(),
- ::tolower);
- if (AsmString.find(FSQRTDOpCode) ==
- 0) { // this is an inline fsqrts instruction
- Opcode = SP::FSQRTD;
- } else if (AsmString.find(FDIVDOpCode) ==
- 0) { // this is an inline fsqrts instruction
- Opcode = SP::FDIVD;
- }
- }
-
// Note: FDIVS and FSQRTS cannot be generated when this erratum fix is
// switched on so we don't need to check for them here. They will
// already have been converted to FSQRTD or FDIVD earlier in the
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