summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
diff options
context:
space:
mode:
authorVenkatraman Govindaraju <venkatra@cs.wisc.edu>2014-03-01 08:30:58 +0000
committerVenkatraman Govindaraju <venkatra@cs.wisc.edu>2014-03-01 08:30:58 +0000
commit78df2dec0c7a92160a98c20306b2b551dade0a2f (patch)
treef51e58f5076fcb23d48f15e8628ef03b5eaa8621 /llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
parenta83c75d2fde55639f43b0e7a0f642dc24ce1c6c3 (diff)
downloadbcm5719-llvm-78df2dec0c7a92160a98c20306b2b551dade0a2f.tar.gz
bcm5719-llvm-78df2dec0c7a92160a98c20306b2b551dade0a2f.zip
[Sparc] Add support for decoding call instructions in the sparc disassembler.
llvm-svn: 202577
Diffstat (limited to 'llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp')
-rw-r--r--llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp21
1 files changed, 21 insertions, 0 deletions
diff --git a/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp b/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
index ae07e0b4f74..3c03994e0a9 100644
--- a/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
+++ b/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
@@ -190,6 +190,8 @@ static DecodeStatus DecodeStoreDFP(MCInst &Inst, unsigned insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn,
uint64_t Address, const void *Decoder);
+static DecodeStatus DecodeCall(MCInst &Inst, unsigned insn,
+ uint64_t Address, const void *Decoder);
#include "SparcGenDisassemblerTables.inc"
@@ -336,3 +338,22 @@ static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn,
return DecodeMem(Inst, insn, Address, Decoder, false,
DecodeQFPRegsRegisterClass);
}
+
+static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
+ uint64_t Address, uint64_t Offset,
+ uint64_t Width, MCInst &MI,
+ const void *Decoder) {
+ const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder);
+ return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch,
+ Offset, Width);
+}
+
+static DecodeStatus DecodeCall(MCInst &MI, unsigned insn,
+ uint64_t Address, const void *Decoder) {
+ unsigned tgt = fieldFromInstruction(insn, 0, 30);
+ tgt <<= 2;
+ if (!tryAddingSymbolicOperand(tgt+Address, false, Address,
+ 0, 30, MI, Decoder))
+ MI.addOperand(MCOperand::CreateImm(tgt));
+ return MCDisassembler::Success;
+}
OpenPOWER on IntegriCloud