diff options
| author | Craig Topper <craig.topper@gmail.com> | 2015-10-18 05:29:05 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2015-10-18 05:29:05 +0000 |
| commit | 92cfdd70f812acb0276a9eb7afe492770dbc5f08 (patch) | |
| tree | 4e74bf051dc17dabf7220d8edfcb31499fd81a36 /llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp | |
| parent | 1d37443718c15f82762e46addcce8a48fcc83751 (diff) | |
| download | bcm5719-llvm-92cfdd70f812acb0276a9eb7afe492770dbc5f08.tar.gz bcm5719-llvm-92cfdd70f812acb0276a9eb7afe492770dbc5f08.zip | |
[Sparc] Use MCPhysReg instead of unsigned to size static arrays of registers. Should reduce the table size.
llvm-svn: 250644
Diffstat (limited to 'llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp index bbbe1564335..51b4b2e764d 100644 --- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp +++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp @@ -14,6 +14,7 @@ #include "llvm/MC/MCInst.h" #include "llvm/MC/MCObjectFileInfo.h" #include "llvm/MC/MCParser/MCParsedAsmOperand.h" +#include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/MC/MCSymbol.h" @@ -98,7 +99,7 @@ public: }; - static const unsigned IntRegs[32] = { + static const MCPhysReg IntRegs[32] = { Sparc::G0, Sparc::G1, Sparc::G2, Sparc::G3, Sparc::G4, Sparc::G5, Sparc::G6, Sparc::G7, Sparc::O0, Sparc::O1, Sparc::O2, Sparc::O3, @@ -108,7 +109,7 @@ public: Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3, Sparc::I4, Sparc::I5, Sparc::I6, Sparc::I7 }; - static const unsigned FloatRegs[32] = { + static const MCPhysReg FloatRegs[32] = { Sparc::F0, Sparc::F1, Sparc::F2, Sparc::F3, Sparc::F4, Sparc::F5, Sparc::F6, Sparc::F7, Sparc::F8, Sparc::F9, Sparc::F10, Sparc::F11, @@ -118,7 +119,7 @@ public: Sparc::F24, Sparc::F25, Sparc::F26, Sparc::F27, Sparc::F28, Sparc::F29, Sparc::F30, Sparc::F31 }; - static const unsigned DoubleRegs[32] = { + static const MCPhysReg DoubleRegs[32] = { Sparc::D0, Sparc::D1, Sparc::D2, Sparc::D3, Sparc::D4, Sparc::D5, Sparc::D6, Sparc::D7, Sparc::D8, Sparc::D7, Sparc::D8, Sparc::D9, @@ -128,13 +129,13 @@ public: Sparc::D24, Sparc::D25, Sparc::D26, Sparc::D27, Sparc::D28, Sparc::D29, Sparc::D30, Sparc::D31 }; - static const unsigned QuadFPRegs[32] = { + static const MCPhysReg QuadFPRegs[32] = { Sparc::Q0, Sparc::Q1, Sparc::Q2, Sparc::Q3, Sparc::Q4, Sparc::Q5, Sparc::Q6, Sparc::Q7, Sparc::Q8, Sparc::Q9, Sparc::Q10, Sparc::Q11, Sparc::Q12, Sparc::Q13, Sparc::Q14, Sparc::Q15 }; - static const unsigned ASRRegs[32] = { + static const MCPhysReg ASRRegs[32] = { SP::Y, SP::ASR1, SP::ASR2, SP::ASR3, SP::ASR4, SP::ASR5, SP::ASR6, SP::ASR7, SP::ASR8, SP::ASR9, SP::ASR10, SP::ASR11, @@ -144,7 +145,7 @@ public: SP::ASR24, SP::ASR25, SP::ASR26, SP::ASR27, SP::ASR28, SP::ASR29, SP::ASR30, SP::ASR31}; - static const unsigned IntPairRegs[] = { + static const MCPhysReg IntPairRegs[] = { Sparc::G0_G1, Sparc::G2_G3, Sparc::G4_G5, Sparc::G6_G7, Sparc::O0_O1, Sparc::O2_O3, Sparc::O4_O5, Sparc::O6_O7, Sparc::L0_L1, Sparc::L2_L3, Sparc::L4_L5, Sparc::L6_L7, |
