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| author | Peter Collingbourne <peter@pcc.me.uk> | 2018-05-21 19:20:29 +0000 |
|---|---|---|
| committer | Peter Collingbourne <peter@pcc.me.uk> | 2018-05-21 19:20:29 +0000 |
| commit | dcd7d6c33112db3618798c1c037460cac58d7f9a (patch) | |
| tree | 21a52d71cf6ec2df9a9d299ca4d4559cd4891382 /llvm/lib/Target/RISCV | |
| parent | a29fe579f48dd1600b21aadae7e90f64d643aef8 (diff) | |
| download | bcm5719-llvm-dcd7d6c33112db3618798c1c037460cac58d7f9a.tar.gz bcm5719-llvm-dcd7d6c33112db3618798c1c037460cac58d7f9a.zip | |
MC: Separate creating a generic object writer from creating a target object writer. NFCI.
With this we gain a little flexibility in how the generic object
writer is created.
Part of PR37466.
Differential Revision: https://reviews.llvm.org/D47045
llvm-svn: 332868
Diffstat (limited to 'llvm/lib/Target/RISCV')
3 files changed, 11 insertions, 14 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp index 87088092164..d61d57e3159 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp @@ -41,8 +41,8 @@ public: const MCValue &Target, MutableArrayRef<char> Data, uint64_t Value, bool IsResolved) const override; - std::unique_ptr<MCObjectWriter> - createObjectWriter(raw_pwrite_stream &OS) const override; + std::unique_ptr<MCObjectTargetWriter> + createObjectTargetWriter() const override; // If linker relaxation is enabled, always emit relocations even if the fixup // can be resolved. This is necessary for correctness as offsets may change @@ -335,9 +335,9 @@ void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, } } -std::unique_ptr<MCObjectWriter> -RISCVAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const { - return createRISCVELFObjectWriter(OS, OSABI, Is64Bit); +std::unique_ptr<MCObjectTargetWriter> +RISCVAsmBackend::createObjectTargetWriter() const { + return createRISCVELFObjectWriter(OSABI, Is64Bit); } } // end anonymous namespace diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp index c0a005c9de1..b164c78c35d 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp @@ -81,10 +81,7 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx, } } -std::unique_ptr<MCObjectWriter> -llvm::createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, - bool Is64Bit) { - return createELFObjectWriter( - llvm::make_unique<RISCVELFObjectWriter>(OSABI, Is64Bit), OS, - /*IsLittleEndian=*/true); +std::unique_ptr<MCObjectTargetWriter> +llvm::createRISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit) { + return llvm::make_unique<RISCVELFObjectWriter>(OSABI, Is64Bit); } diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h index ef58a6b8cbc..0228253c08c 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h @@ -24,7 +24,7 @@ class MCAsmBackend; class MCCodeEmitter; class MCContext; class MCInstrInfo; -class MCObjectWriter; +class MCObjectTargetWriter; class MCRegisterInfo; class MCSubtargetInfo; class StringRef; @@ -44,8 +44,8 @@ MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options); -std::unique_ptr<MCObjectWriter> -createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool Is64Bit); +std::unique_ptr<MCObjectTargetWriter> createRISCVELFObjectWriter(uint8_t OSABI, + bool Is64Bit); } // Defines symbolic names for RISC-V registers. |

