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authorAlex Bradbury <asb@lowrisc.org>2018-10-03 13:13:13 +0000
committerAlex Bradbury <asb@lowrisc.org>2018-10-03 13:13:13 +0000
commitd33ffe9bb1c177095422168f3d58d8f62f1098a0 (patch)
treea8970d52d3977e53af0e5d9986a378776838d17e /llvm/lib/Target/RISCV
parent99031b79a678fbd685defce0e61696ba04f45f25 (diff)
downloadbcm5719-llvm-d33ffe9bb1c177095422168f3d58d8f62f1098a0.tar.gz
bcm5719-llvm-d33ffe9bb1c177095422168f3d58d8f62f1098a0.zip
[RISCV][NFC] Refactor RISCVDAGToDAGISel::Select
Introduce and use a switch on the opcode. llvm-svn: 343688
Diffstat (limited to 'llvm/lib/Target/RISCV')
-rw-r--r--llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp24
1 files changed, 12 insertions, 12 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 04441b9a9b1..7aa83ae3f25 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -66,10 +66,7 @@ void RISCVDAGToDAGISel::PostprocessISelDAG() {
}
void RISCVDAGToDAGISel::Select(SDNode *Node) {
- unsigned Opcode = Node->getOpcode();
- MVT XLenVT = Subtarget->getXLenVT();
-
- // If we have a custom node, we have already selected
+ // If we have a custom node, we have already selected.
if (Node->isMachineOpcode()) {
LLVM_DEBUG(dbgs() << "== "; Node->dump(CurDAG); dbgs() << "\n");
Node->setNodeId(-1);
@@ -78,27 +75,30 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
// Instruction Selection not handled by the auto-generated tablegen selection
// should be handled here.
+ unsigned Opcode = Node->getOpcode();
+ MVT XLenVT = Subtarget->getXLenVT();
+ SDLoc DL(Node);
EVT VT = Node->getValueType(0);
- if (Opcode == ISD::Constant && VT == XLenVT) {
- auto *ConstNode = cast<ConstantSDNode>(Node);
- // Materialize zero constants as copies from X0. This allows the coalescer
- // to propagate these into other instructions.
- if (ConstNode->isNullValue()) {
+
+ switch (Opcode) {
+ case ISD::Constant: {
+ auto ConstNode = cast<ConstantSDNode>(Node);
+ if (VT == XLenVT && ConstNode->isNullValue()) {
SDValue New = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), SDLoc(Node),
RISCV::X0, XLenVT);
ReplaceNode(Node, New.getNode());
return;
}
+ break;
}
- if (Opcode == ISD::FrameIndex) {
- SDLoc DL(Node);
+ case ISD::FrameIndex: {
SDValue Imm = CurDAG->getTargetConstant(0, DL, XLenVT);
int FI = cast<FrameIndexSDNode>(Node)->getIndex();
- EVT VT = Node->getValueType(0);
SDValue TFI = CurDAG->getTargetFrameIndex(FI, VT);
ReplaceNode(Node, CurDAG->getMachineNode(RISCV::ADDI, DL, VT, TFI, Imm));
return;
}
+ }
// Select the default instruction.
SelectCode(Node);
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