diff options
| author | Nico Weber <nicolasweber@gmx.de> | 2018-04-04 12:37:44 +0000 |
|---|---|---|
| committer | Nico Weber <nicolasweber@gmx.de> | 2018-04-04 12:37:44 +0000 |
| commit | 1cbd0969143e1e7c016fcfda5866a598e5e4b765 (patch) | |
| tree | d36c95cd33587ad51f6aec0133d839c5fe4a2b6e /llvm/lib/Target/RISCV | |
| parent | 55d717805ba4731f1b09d09d9d9fd53527c60add (diff) | |
| download | bcm5719-llvm-1cbd0969143e1e7c016fcfda5866a598e5e4b765.tar.gz bcm5719-llvm-1cbd0969143e1e7c016fcfda5866a598e5e4b765.zip | |
Sort targetgen calls in lib/Target/*/CMakeLists.
Makes it easier to see mistakes such as the one fixed in r329178 and makes
the different target CMakeLists more consistent.
Also remove some stale-looking comments from the Nios2 target cmakefile.
No intended behavior change.
llvm-svn: 329181
Diffstat (limited to 'llvm/lib/Target/RISCV')
| -rw-r--r-- | llvm/lib/Target/RISCV/CMakeLists.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/RISCV/CMakeLists.txt b/llvm/lib/Target/RISCV/CMakeLists.txt index 71787d08719..fa9adeb25eb 100644 --- a/llvm/lib/Target/RISCV/CMakeLists.txt +++ b/llvm/lib/Target/RISCV/CMakeLists.txt @@ -1,14 +1,14 @@ set(LLVM_TARGET_DEFINITIONS RISCV.td) -tablegen(LLVM RISCVGenRegisterInfo.inc -gen-register-info) -tablegen(LLVM RISCVGenInstrInfo.inc -gen-instr-info) -tablegen(LLVM RISCVGenMCCodeEmitter.inc -gen-emitter) -tablegen(LLVM RISCVGenMCPseudoLowering.inc -gen-pseudo-lowering) tablegen(LLVM RISCVGenAsmMatcher.inc -gen-asm-matcher) tablegen(LLVM RISCVGenAsmWriter.inc -gen-asm-writer) tablegen(LLVM RISCVGenDAGISel.inc -gen-dag-isel) -tablegen(LLVM RISCVGenSubtargetInfo.inc -gen-subtarget) tablegen(LLVM RISCVGenDisassemblerTables.inc -gen-disassembler) +tablegen(LLVM RISCVGenInstrInfo.inc -gen-instr-info) +tablegen(LLVM RISCVGenMCCodeEmitter.inc -gen-emitter) +tablegen(LLVM RISCVGenMCPseudoLowering.inc -gen-pseudo-lowering) +tablegen(LLVM RISCVGenRegisterInfo.inc -gen-register-info) +tablegen(LLVM RISCVGenSubtargetInfo.inc -gen-subtarget) add_public_tablegen_target(RISCVCommonTableGen) |
