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| author | Alex Bradbury <asb@lowrisc.org> | 2018-10-04 05:27:50 +0000 | 
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2018-10-04 05:27:50 +0000 | 
| commit | 0e16766b76550b2eb3416f386a62ab76450526c2 (patch) | |
| tree | 1341a9887d24851409706f56d1afe3086dcbddbe /llvm/lib/Target/RISCV | |
| parent | 5fbdce131de25393b7166c43b4b1604fc04a9f16 (diff) | |
| download | bcm5719-llvm-0e16766b76550b2eb3416f386a62ab76450526c2.tar.gz bcm5719-llvm-0e16766b76550b2eb3416f386a62ab76450526c2.zip  | |
[RISCV][NFC] Fix naming of RISCVISelLowering::{LowerRETURNADDR,LowerFRAMEADDR}
Rename to lowerRETURNADDR, lowerFRAMEADDR in order to be consistent with the 
LLVM coding style and the other functions in this file.
llvm-svn: 343752
Diffstat (limited to 'llvm/lib/Target/RISCV')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 | 
2 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 550c9061eb4..d29a80e22a6 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -312,9 +312,9 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,    case ISD::VASTART:      return lowerVASTART(Op, DAG);    case ISD::FRAMEADDR: -    return LowerFRAMEADDR(Op, DAG); +    return lowerFRAMEADDR(Op, DAG);    case ISD::RETURNADDR: -    return LowerRETURNADDR(Op, DAG); +    return lowerRETURNADDR(Op, DAG);    }  } @@ -441,7 +441,7 @@ SDValue RISCVTargetLowering::lowerVASTART(SDValue Op, SelectionDAG &DAG) const {                        MachinePointerInfo(SV));  } -SDValue RISCVTargetLowering::LowerFRAMEADDR(SDValue Op, +SDValue RISCVTargetLowering::lowerFRAMEADDR(SDValue Op,                                              SelectionDAG &DAG) const {    const RISCVRegisterInfo &RI = *Subtarget.getRegisterInfo();    MachineFunction &MF = DAG.getMachineFunction(); @@ -464,7 +464,7 @@ SDValue RISCVTargetLowering::LowerFRAMEADDR(SDValue Op,    return FrameAddr;  } -SDValue RISCVTargetLowering::LowerRETURNADDR(SDValue Op, +SDValue RISCVTargetLowering::lowerRETURNADDR(SDValue Op,                                               SelectionDAG &DAG) const {    const RISCVRegisterInfo &RI = *Subtarget.getRegisterInfo();    MachineFunction &MF = DAG.getMachineFunction(); @@ -481,7 +481,7 @@ SDValue RISCVTargetLowering::LowerRETURNADDR(SDValue Op,    unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();    if (Depth) {      int Off = -XLenInBytes; -    SDValue FrameAddr = LowerFRAMEADDR(Op, DAG); +    SDValue FrameAddr = lowerFRAMEADDR(Op, DAG);      SDValue Offset = DAG.getConstant(Off, DL, VT);      return DAG.getLoad(VT, DL, DAG.getEntryNode(),                         DAG.getNode(ISD::ADD, DL, VT, FrameAddr, Offset), diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h index 47dbc1af969..fe988bb14de 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.h +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h @@ -114,8 +114,8 @@ private:    SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const;    SDValue lowerSELECT(SDValue Op, SelectionDAG &DAG) const;    SDValue lowerVASTART(SDValue Op, SelectionDAG &DAG) const; -  SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; -  SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const; +  SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; +  SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;    bool IsEligibleForTailCallOptimization(CCState &CCInfo,      CallLoweringInfo &CLI, MachineFunction &MF,  | 

