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authorAlex Bradbury <asb@lowrisc.org>2017-11-09 15:00:03 +0000
committerAlex Bradbury <asb@lowrisc.org>2017-11-09 15:00:03 +0000
commit8c345c5aa903b67bdf43394f05205a09c50f6dce (patch)
tree43678bf3965f191557dade2b8254ea1a286198d9 /llvm/lib/Target/RISCV/RISCVSubtarget.h
parent89d31658e5601c8a9a7737db64e239c1efcc5d6b (diff)
downloadbcm5719-llvm-8c345c5aa903b67bdf43394f05205a09c50f6dce.tar.gz
bcm5719-llvm-8c345c5aa903b67bdf43394f05205a09c50f6dce.zip
[RISCV] MC layer support for the standard RV32A instruction set extension
llvm-svn: 317791
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVSubtarget.h')
-rw-r--r--llvm/lib/Target/RISCV/RISCVSubtarget.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h
index be9b04990ca..14b25c14dbe 100644
--- a/llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -30,7 +30,8 @@ class StringRef;
class RISCVSubtarget : public RISCVGenSubtargetInfo {
virtual void anchor();
- bool HasStdExtM;
+ bool HasStdExtM = false;
+ bool HasStdExtA = false;
bool HasRV64 = false;
unsigned XLen = 32;
MVT XLenVT = MVT::i32;
@@ -68,6 +69,7 @@ public:
return &TSInfo;
}
bool hasStdExtM() const { return HasStdExtM; }
+ bool hasStdExtA() const { return HasStdExtA; }
bool is64Bit() const { return HasRV64; }
MVT getXLenVT() const { return XLenVT; }
unsigned getXLen() const { return XLen; }
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