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author | Luís Marques <luismarques@lowrisc.org> | 2019-11-10 16:04:43 +0000 |
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committer | Luís Marques <luismarques@lowrisc.org> | 2019-11-10 16:09:14 +0000 |
commit | 1c737f54bee9df81c63ddf6ee2ad1d23a93c0ba0 (patch) | |
tree | 308604f3e58ad353833b7aa69754ce83ad7e0cfb /llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | |
parent | be0fead7bffbf65c519ca50c89584e65dcf18793 (diff) | |
download | bcm5719-llvm-1c737f54bee9df81c63ddf6ee2ad1d23a93c0ba0.tar.gz bcm5719-llvm-1c737f54bee9df81c63ddf6ee2ad1d23a93c0ba0.zip |
[RISCV] Fix CFA when doing split sp adjustment with fp
Summary: When using the split sp adjustment and using the frame-pointer
we were still emitting CFI CFA directives based on the sp value. The
final sp-based offset also didn't reflect the two-stage sp adjust. There
remain CFI issues that aren't related to the split sp adjustment, and
thus will be addressed in a separate patch.
Reviewers: asb, lenary, shiva0217
Reviewed By: lenary, shiva0217
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69385
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVFrameLowering.cpp')
-rw-r--r-- | llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 40 |
1 files changed, 25 insertions, 15 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp index 6344ed448ad..1aef67f90a6 100644 --- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp @@ -195,11 +195,16 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF, "SecondSPAdjustAmount should be greater than zero"); adjustReg(MBB, MBBI, DL, SPReg, SPReg, -SecondSPAdjustAmount, MachineInstr::FrameSetup); - // Emit ".cfi_def_cfa_offset StackSize" - unsigned CFIIndex = MF.addFrameInst( - MCCFIInstruction::createDefCfaOffset(nullptr, -MFI.getStackSize())); - BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex); + + // If we are using a frame-pointer, and thus emitted ".cfi_def_cfa fp, 0", + // don't emit an sp-based .cfi_def_cfa_offset + if (!hasFP(MF)) { + // Emit ".cfi_def_cfa_offset StackSize" + unsigned CFIIndex = MF.addFrameInst( + MCCFIInstruction::createDefCfaOffset(nullptr, -MFI.getStackSize())); + BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) + .addCFIIndex(CFIIndex); + } } if (hasFP(MF)) { @@ -267,13 +272,14 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF, adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, SecondSPAdjustAmount, MachineInstr::FrameDestroy); - // Emit ".cfi_def_cfa_offset FirstSPAdjustAmount" - unsigned CFIIndex = - MF.addFrameInst( - MCCFIInstruction::createDefCfaOffset(nullptr, - -FirstSPAdjustAmount)); - BuildMI(MBB, LastFrameDestroy, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex); + // Emit ".cfi_def_cfa_offset FirstSPAdjustAmount" if using an sp-based CFA + if (!hasFP(MF)) { + unsigned CFIIndex = MF.addFrameInst( + MCCFIInstruction::createDefCfaOffset(nullptr, -FirstSPAdjustAmount)); + BuildMI(MBB, LastFrameDestroy, DL, + TII->get(TargetOpcode::CFI_INSTRUCTION)) + .addCFIIndex(CFIIndex); + } } if (hasFP(MF)) { @@ -283,10 +289,14 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF, Register DestReg = I->getOperand(0).getReg(); if (DestReg == FPReg) { // If there is frame pointer, after restoring $fp registers, we - // need adjust CFA to ($sp - FPOffset). - // Emit ".cfi_def_cfa $sp, -FPOffset" + // need adjust CFA back to the correct sp-based offset. + // Emit ".cfi_def_cfa $sp, CFAOffset" + uint64_t CFAOffset = + FirstSPAdjustAmount + ? -FirstSPAdjustAmount + RVFI->getVarArgsSaveSize() + : -FPOffset; unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfa( - nullptr, RI->getDwarfRegNum(SPReg, true), -FPOffset)); + nullptr, RI->getDwarfRegNum(SPReg, true), CFAOffset)); BuildMI(MBB, std::next(I), DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) .addCFIIndex(CFIIndex); |