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| author | Alex Bradbury <asb@lowrisc.org> | 2017-10-19 14:29:03 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2017-10-19 14:29:03 +0000 |
| commit | ee7c7ecd0366214d6f7a6d38fb4d8c16d98cbb85 (patch) | |
| tree | 200f2b22394cc9ed5d25bb19ea349287de54faff /llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | |
| parent | 27c1f464e6aa287bfcfe775df10b5c92504a4534 (diff) | |
| download | bcm5719-llvm-ee7c7ecd0366214d6f7a6d38fb4d8c16d98cbb85.tar.gz bcm5719-llvm-ee7c7ecd0366214d6f7a6d38fb4d8c16d98cbb85.zip | |
[RISCV] Prepare for the use of variable-sized register classes
While parameterising by XLen, also take the opportunity to clean up the
formatting of the RISCV .td files.
This commit unifies the in-tree code with my patchset at
<https://github.com/lowrisc/riscv-llvm>.
llvm-svn: 316159
Diffstat (limited to 'llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h')
| -rw-r--r-- | llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h index cfb124262c6..9fafbb0a95a 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h @@ -26,9 +26,10 @@ enum { InstFormatR = 1, InstFormatI = 2, InstFormatS = 3, - InstFormatSB = 4, + InstFormatB = 4, InstFormatU = 5, - InstFormatOther = 6, + InstFormatJ = 6, + InstFormatOther = 7, InstFormatMask = 15 }; |
