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| author | Lewis Revill <lewis.revill@embecosm.com> | 2019-04-23 14:46:13 +0000 |
|---|---|---|
| committer | Lewis Revill <lewis.revill@embecosm.com> | 2019-04-23 14:46:13 +0000 |
| commit | df3cb477a314a3c3abbbfbbfa2e88245bcfa325f (patch) | |
| tree | 00e1c3f3f730e4bbd7647e1c00f4c0bab3228197 /llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | |
| parent | 9fc422830a9003eaf9d649e07486e4d985d68a8f (diff) | |
| download | bcm5719-llvm-df3cb477a314a3c3abbbfbbfa2e88245bcfa325f.tar.gz bcm5719-llvm-df3cb477a314a3c3abbbfbbfa2e88245bcfa325f.zip | |
[RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers
This patch adds support for parsing and assembling the %tls_ie_pcrel_hi
and %tls_gd_pcrel_hi modifiers.
Differential Revision: https://reviews.llvm.org/D55342
llvm-svn: 358994
Diffstat (limited to 'llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h')
| -rw-r--r-- | llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h index f16bd4e4402..254249c87dc 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h @@ -109,6 +109,8 @@ public: { "fixup_riscv_tprel_lo12_i", 20, 12, 0 }, { "fixup_riscv_tprel_lo12_s", 0, 32, 0 }, { "fixup_riscv_tprel_add", 0, 0, 0 }, + { "fixup_riscv_tls_got_hi20", 12, 20, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_riscv_tls_gd_hi20", 12, 20, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_riscv_jal", 12, 20, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_riscv_branch", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_riscv_rvc_jump", 2, 11, MCFixupKindInfo::FKF_IsPCRel }, |
