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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-06 23:08:18 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-06 23:08:18 +0000 |
| commit | 4c0ffccbbf4ef58147bd8ae115cc9f6c3ef7d7a1 (patch) | |
| tree | 265ad3981d47e7bc78aad84738aae70be15a3e3a /llvm/lib/Target/R600/SIRegisterInfo.h | |
| parent | 8b24e1e4fb91f9bdb7f9a64e8d92e8dcd0bebf8b (diff) | |
| download | bcm5719-llvm-4c0ffccbbf4ef58147bd8ae115cc9f6c3ef7d7a1.tar.gz bcm5719-llvm-4c0ffccbbf4ef58147bd8ae115cc9f6c3ef7d7a1.zip | |
R600/SI: Add more special cases for opcodes to ensureSRegLimit()
Also factor out the register class lookup to its own function.
llvm-svn: 187830
Diffstat (limited to 'llvm/lib/Target/R600/SIRegisterInfo.h')
| -rw-r--r-- | llvm/lib/Target/R600/SIRegisterInfo.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/SIRegisterInfo.h b/llvm/lib/Target/R600/SIRegisterInfo.h index c322f94914c..d0df4f9de60 100644 --- a/llvm/lib/Target/R600/SIRegisterInfo.h +++ b/llvm/lib/Target/R600/SIRegisterInfo.h @@ -41,6 +41,10 @@ struct SIRegisterInfo : public AMDGPURegisterInfo { /// \brief get the register class of the specified type to use in the /// CFGStructurizer virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const; + + /// \brief Return the 'base' register class for this register. + /// e.g. SGPR0 => SReg_32, VGPR => VReg_32 SGPR0_SGPR1 -> SReg_32, etc. + const TargetRegisterClass *getPhysRegClass(unsigned Reg) const; }; } // End namespace llvm |
