R600/SI: Do abs/neg folding with ComplexPatterns

Abs/neg folding has moved out of foldOperands and into the instruction
selection phase using complex patterns.  As a consequence of this
change, we now prefer to select the 64-bit encoding for most
instructions and the modifier operands have been dropped from
integer VOP3 instructions.

llvm-svn: 214467

1 files changed, 0 insertions, 4 deletions

diff --git a/llvm/lib/Target/R600/SILowerI1Copies.cpp b/llvm/lib/Target/R600/SILowerI1Copies.cpp
index db19235995b..4ba87a5f9a1 100644
--- a/llvm/lib/Target/R600/SILowerI1Copies.cpp
+++ b/llvm/lib/Target/R600/SILowerI1Copies.cpp
@@ -136,11 +136,7 @@ bool SILowerI1Copies::runOnMachineFunction(MachineFunction &MF) {
                  SrcRC == &AMDGPU::VReg_1RegClass) {
         BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(AMDGPU::V_CMP_NE_I32_e64))
                 .addOperand(MI.getOperand(0))
-                .addImm(0)
                 .addOperand(MI.getOperand(1))
-                .addImm(0)
-                .addImm(0)
-                .addImm(0)
                 .addImm(0);
         MI.eraseFromParent();
       }