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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-07-13 03:06:39 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-07-13 03:06:39 +0000
commit762af96f4638a2e22b7446ad0d528d2d332e922f (patch)
tree7f27331bb1ecacc858d8a0baa72d835681a644bd /llvm/lib/Target/R600/SILowerControlFlow.cpp
parent7d5e2cb09f20caa09c7afd6e29ed9598afbda71c (diff)
downloadbcm5719-llvm-762af96f4638a2e22b7446ad0d528d2d332e922f.tar.gz
bcm5719-llvm-762af96f4638a2e22b7446ad0d528d2d332e922f.zip
R600: Make ShaderType private
llvm-svn: 212896
Diffstat (limited to 'llvm/lib/Target/R600/SILowerControlFlow.cpp')
-rw-r--r--llvm/lib/Target/R600/SILowerControlFlow.cpp16
1 files changed, 9 insertions, 7 deletions
diff --git a/llvm/lib/Target/R600/SILowerControlFlow.cpp b/llvm/lib/Target/R600/SILowerControlFlow.cpp
index 9f5ff29ad93..75b5a5e027f 100644
--- a/llvm/lib/Target/R600/SILowerControlFlow.cpp
+++ b/llvm/lib/Target/R600/SILowerControlFlow.cpp
@@ -147,7 +147,7 @@ void SILowerControlFlowPass::SkipIfDead(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = MI.getDebugLoc();
- if (MBB.getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType !=
+ if (MBB.getParent()->getInfo<SIMachineFunctionInfo>()->getShaderType() !=
ShaderType::PIXEL ||
!shouldSkip(&MBB, &MBB.getParent()->back()))
return;
@@ -298,11 +298,13 @@ void SILowerControlFlowPass::Kill(MachineInstr &MI) {
DebugLoc DL = MI.getDebugLoc();
const MachineOperand &Op = MI.getOperand(0);
- // Kill is only allowed in pixel / geometry shaders
- assert(MBB.getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType ==
- ShaderType::PIXEL ||
- MBB.getParent()->getInfo<SIMachineFunctionInfo>()->ShaderType ==
- ShaderType::GEOMETRY);
+#ifndef NDEBUG
+ const SIMachineFunctionInfo *MFI
+ = MBB.getParent()->getInfo<SIMachineFunctionInfo>();
+ // Kill is only allowed in pixel / geometry shaders.
+ assert(MFI->getShaderType() == ShaderType::PIXEL ||
+ MFI->getShaderType() == ShaderType::GEOMETRY);
+#endif
// Clear this thread from the exec mask if the operand is negative
if ((Op.isImm() || Op.isFPImm())) {
@@ -540,7 +542,7 @@ bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) {
InitM0ForLDS(MBB.getFirstNonPHI());
}
- if (NeedWQM && MFI->ShaderType == ShaderType::PIXEL) {
+ if (NeedWQM && MFI->getShaderType() == ShaderType::PIXEL) {
MachineBasicBlock &MBB = MF.front();
BuildMI(MBB, MBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WQM_B64),
AMDGPU::EXEC).addReg(AMDGPU::EXEC);
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