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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-01-20 17:49:41 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-01-20 17:49:41 +0000 |
| commit | 1106b1c66243ca54b8adc671432c6b0c13564a74 (patch) | |
| tree | 7e903e13bef9496edfef8d24b5affcaace8b9ab3 /llvm/lib/Target/R600/SIInstrInfo.cpp | |
| parent | 6fa2141dcadd3c5fc237b83b79251a3f1b723f82 (diff) | |
| download | bcm5719-llvm-1106b1c66243ca54b8adc671432c6b0c13564a74.tar.gz bcm5719-llvm-1106b1c66243ca54b8adc671432c6b0c13564a74.zip | |
R600/SI: Update SIInstrInfo:verifyInstruction() after r225662
Now that we have our own custom register operand types, we need
to handle them in the verifiier.
llvm-svn: 226583
Diffstat (limited to 'llvm/lib/Target/R600/SIInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index b2c6ac608ab..8c2f324005a 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -1130,12 +1130,18 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI, } switch (Desc.OpInfo[i].OperandType) { - case MCOI::OPERAND_REGISTER: { - if (MI->getOperand(i).isImm() && - !isImmOperandLegal(MI, i, MI->getOperand(i))) { - ErrInfo = "Illegal immediate value for operand."; - return false; - } + case MCOI::OPERAND_REGISTER: + if (MI->getOperand(i).isImm() || MI->getOperand(i).isFPImm()) { + ErrInfo = "Illegal immediate value for operand."; + return false; + } + break; + case AMDGPU::OPERAND_REG_IMM32: + break; + case AMDGPU::OPERAND_REG_INLINE_C: + if (MI->getOperand(i).isImm() && !isInlineConstant(MI->getOperand(i))) { + ErrInfo = "Illegal immediate value for operand."; + return false; } break; case MCOI::OPERAND_IMMEDIATE: |
