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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-11-14 14:08:00 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-11-14 14:08:00 +0000 |
| commit | 9d7ddd516ece5484333a0057f820905e5a8c3f99 (patch) | |
| tree | bd586b0c77bebad078176258d2d451978fe98f4c /llvm/lib/Target/R600/R600Instructions.td | |
| parent | 631bd7b1108d963fa6b9985c086fbcd63926d3dd (diff) | |
| download | bcm5719-llvm-9d7ddd516ece5484333a0057f820905e5a8c3f99.tar.gz bcm5719-llvm-9d7ddd516ece5484333a0057f820905e5a8c3f99.zip | |
R600/SI: Start implementing an assembler
This was done using the Sparc and PowerPC AsmParsers as guides. So far it
is very simple and only supports sopp instructions.
llvm-svn: 221994
Diffstat (limited to 'llvm/lib/Target/R600/R600Instructions.td')
| -rw-r--r-- | llvm/lib/Target/R600/R600Instructions.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/R600Instructions.td b/llvm/lib/Target/R600/R600Instructions.td index 69695a3bce3..b6c00f89d5c 100644 --- a/llvm/lib/Target/R600/R600Instructions.td +++ b/llvm/lib/Target/R600/R600Instructions.td @@ -1496,6 +1496,7 @@ class ILFormat<dag outs, dag ins, string asmstr, list<dag> pattern> let mayLoad = 0; let mayStore = 0; let hasSideEffects = 0; + let isCodeGenOnly = 1; } multiclass BranchConditional<SDNode Op, RegisterClass rci, RegisterClass rcf> { |
