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authorTom Stellard <thomas.stellard@amd.com>2013-06-28 15:46:53 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-06-28 15:46:53 +0000
commit5eb903d9c5c7bfc413f1f925c7c396dbcf932d33 (patch)
tree16edb37d3f9cb39c8a5fd0e637f2f5155951badf /llvm/lib/Target/R600/R600Instructions.td
parent1151031eb7e470ee87a802a1c5bdcee1385eaacb (diff)
downloadbcm5719-llvm-5eb903d9c5c7bfc413f1f925c7c396dbcf932d33.tar.gz
bcm5719-llvm-5eb903d9c5c7bfc413f1f925c7c396dbcf932d33.zip
R600: Add ALUInst bit to tablegen definitions v2
v2: - Remove functions left over from a previous rebase. Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 185160
Diffstat (limited to 'llvm/lib/Target/R600/R600Instructions.td')
-rw-r--r--llvm/lib/Target/R600/R600Instructions.td3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/R600Instructions.td b/llvm/lib/Target/R600/R600Instructions.td
index d819d44abf9..b0a82ff628c 100644
--- a/llvm/lib/Target/R600/R600Instructions.td
+++ b/llvm/lib/Target/R600/R600Instructions.td
@@ -114,6 +114,7 @@ class R600_1OP <bits<11> inst, string opName, list<dag> pattern,
let update_pred = 0;
let HasNativeOperands = 1;
let Op1 = 1;
+ let ALUInst = 1;
let DisableEncoding = "$literal";
let UseNamedOperandTable = 1;
@@ -151,6 +152,7 @@ class R600_2OP <bits<11> inst, string opName, list<dag> pattern,
let HasNativeOperands = 1;
let Op2 = 1;
+ let ALUInst = 1;
let DisableEncoding = "$literal";
let UseNamedOperandTable = 1;
@@ -193,6 +195,7 @@ class R600_3OP <bits<5> inst, string opName, list<dag> pattern,
let DisableEncoding = "$literal";
let Op3 = 1;
let UseNamedOperandTable = 1;
+ let ALUInst = 1;
let Inst{31-0} = Word0;
let Inst{63-32} = Word1;
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