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| author | Vincent Lejeune <vljn@ovi.com> | 2013-05-17 16:50:09 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-05-17 16:50:09 +0000 |
| commit | 4ebef18ab548e60afa62a6c611d1a97e24388b59 (patch) | |
| tree | c2015ce7ef3f42399d01a9dec5a288abf15b9ca8 /llvm/lib/Target/R600/R600ISelLowering.cpp | |
| parent | 0fca91d52e8b7d99717578295453e4bc77c28318 (diff) | |
| download | bcm5719-llvm-4ebef18ab548e60afa62a6c611d1a97e24388b59.tar.gz bcm5719-llvm-4ebef18ab548e60afa62a6c611d1a97e24388b59.zip | |
R600: Rename 128 bit registers.
Almost all instructions that takes a 128 bits reg as input (fetch, export...)
have the abilities to swizzle their argument and output. Instead of printing
default swizzle for each 128 bits reg, rename T*.XYZW to T* and let instructions
print potentially optimized swizzles themselves.
llvm-svn: 182124
Diffstat (limited to 'llvm/lib/Target/R600/R600ISelLowering.cpp')
0 files changed, 0 insertions, 0 deletions
