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authorAndrew Trick <atrick@apple.com>2015-02-16 18:10:47 +0000
committerAndrew Trick <atrick@apple.com>2015-02-16 18:10:47 +0000
commit05938a548139554dbc5bd44c9837da5f412ab85c (patch)
treecd7c7d2f8b602da68cda1fdbf44707a3c4c3c5c8 /llvm/lib/Target/R600/R600ISelLowering.cpp
parentc64150b8f3981835a23cf82377a243c163c92f47 (diff)
downloadbcm5719-llvm-05938a548139554dbc5bd44c9837da5f412ab85c.tar.gz
bcm5719-llvm-05938a548139554dbc5bd44c9837da5f412ab85c.zip
AArch64: Safely handle the incoming sret call argument.
This adds a safe interface to the machine independent InputArg struct for accessing the index of the original (IR-level) argument. When a non-native return type is lowered, we generate the hidden machine-level sret argument on-the-fly. Before this fix, we were representing this argument as OrigArgIndex == 0, which is an outright lie. In particular this crashed in the AArch64 backend where we actually try to access the type of the original argument. Now we use a sentinel value for machine arguments that have no original argument index. AArch64, ARM, Mips, and PPC now check for this case before accessing the original argument. Fixes <rdar://19792160> Null pointer assertion in AArch64TargetLowering llvm-svn: 229413
Diffstat (limited to 'llvm/lib/Target/R600/R600ISelLowering.cpp')
-rw-r--r--llvm/lib/Target/R600/R600ISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/R600ISelLowering.cpp b/llvm/lib/Target/R600/R600ISelLowering.cpp
index 70cc876cd93..38e17f13755 100644
--- a/llvm/lib/Target/R600/R600ISelLowering.cpp
+++ b/llvm/lib/Target/R600/R600ISelLowering.cpp
@@ -1693,7 +1693,7 @@ SDValue R600TargetLowering::LowerFormalArguments(
// XXX - I think PartOffset should give you this, but it seems to give the
// size of the register which isn't useful.
- unsigned ValBase = ArgLocs[In.OrigArgIndex].getLocMemOffset();
+ unsigned ValBase = ArgLocs[In.getOrigArgIndex()].getLocMemOffset();
unsigned PartOffset = VA.getLocMemOffset();
unsigned Offset = 36 + VA.getLocMemOffset();
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