diff options
author | Tom Stellard <thomas.stellard@amd.com> | 2015-02-11 17:11:50 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2015-02-11 17:11:50 +0000 |
commit | c65b36061ad75aed9083b293f9f5c6b65a45c7e1 (patch) | |
tree | 5880ec53e0acc1611cd11c5dc0292224a4ee3f01 /llvm/lib/Target/R600/AMDGPUTargetMachine.cpp | |
parent | 502ef4e79154680eccc3875e3587db4330155036 (diff) | |
download | bcm5719-llvm-c65b36061ad75aed9083b293f9f5c6b65a45c7e1.tar.gz bcm5719-llvm-c65b36061ad75aed9083b293f9f5c6b65a45c7e1.zip |
R600: Create an R600TargetMachine for pre-gcn GPUs
No functinality change. R600TargetMachine inherits from
AMDGPUTargetMachine.
llvm-svn: 228849
Diffstat (limited to 'llvm/lib/Target/R600/AMDGPUTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/R600/AMDGPUTargetMachine.cpp | 39 |
1 files changed, 24 insertions, 15 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp index 14c8a841f19..6f115f0da68 100644 --- a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp @@ -39,7 +39,7 @@ using namespace llvm; extern "C" void LLVMInitializeR600Target() { // Register the target - RegisterTargetMachine<AMDGPUTargetMachine> X(TheAMDGPUTarget); + RegisterTargetMachine<R600TargetMachine> X(TheAMDGPUTarget); RegisterTargetMachine<GCNTargetMachine> Y(TheGCNTarget); } @@ -83,6 +83,29 @@ AMDGPUTargetMachine::~AMDGPUTargetMachine() { delete TLOF; } +//===----------------------------------------------------------------------===// +// R600 Target Machine (R600 -> Cayman) +//===----------------------------------------------------------------------===// + +R600TargetMachine::R600TargetMachine(const Target &T, StringRef TT, StringRef FS, + StringRef CPU, TargetOptions Options, Reloc::Model RM, + CodeModel::Model CM, CodeGenOpt::Level OL) : + AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { } + + +//===----------------------------------------------------------------------===// +// GCN Target Machine (SI+) +//===----------------------------------------------------------------------===// + +GCNTargetMachine::GCNTargetMachine(const Target &T, StringRef TT, StringRef FS, + StringRef CPU, TargetOptions Options, Reloc::Model RM, + CodeModel::Model CM, CodeGenOpt::Level OL) : + AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { } + +//===----------------------------------------------------------------------===// +// AMDGPU Pass Setup +//===----------------------------------------------------------------------===// + namespace { class AMDGPUPassConfig : public TargetPassConfig { public: @@ -116,10 +139,6 @@ TargetPassConfig *AMDGPUTargetMachine::createPassConfig(PassManagerBase &PM) { return new AMDGPUPassConfig(this, PM); } -//===----------------------------------------------------------------------===// -// AMDGPU Pass Setup -//===----------------------------------------------------------------------===// - TargetIRAnalysis AMDGPUTargetMachine::getTargetIRAnalysis() { return TargetIRAnalysis( [this](Function &F) { return TargetTransformInfo(AMDGPUTTIImpl(this)); }); @@ -234,13 +253,3 @@ void AMDGPUPassConfig::addPreEmitPass() { addPass(createSILowerControlFlowPass(*TM), false); } } - - -//===----------------------------------------------------------------------===// -// GCN Target Machine (SI+) -//===----------------------------------------------------------------------===// - -GCNTargetMachine::GCNTargetMachine(const Target &T, StringRef TT, StringRef FS, - StringRef CPU, TargetOptions Options, Reloc::Model RM, - CodeModel::Model CM, CodeGenOpt::Level OL) : - AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { } |