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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-07-14 23:40:49 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-07-14 23:40:49 +0000
commitf171cf23b8dee56cb8ac66c78d2f0e44d23442ce (patch)
treedc3091e3b2f1430ec4dbacafd3f6600732f81deb /llvm/lib/Target/R600/AMDGPUSubtarget.cpp
parentc6ae7b4763f6b12602f116cb15c5d19c628e2c21 (diff)
downloadbcm5719-llvm-f171cf23b8dee56cb8ac66c78d2f0e44d23442ce.tar.gz
bcm5719-llvm-f171cf23b8dee56cb8ac66c78d2f0e44d23442ce.zip
R600: Add denormal handling subtarget features.
llvm-svn: 213018
Diffstat (limited to 'llvm/lib/Target/R600/AMDGPUSubtarget.cpp')
-rw-r--r--llvm/lib/Target/R600/AMDGPUSubtarget.cpp18
1 files changed, 17 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUSubtarget.cpp b/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
index d5203611756..e3c2a50ab82 100644
--- a/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
+++ b/llvm/lib/Target/R600/AMDGPUSubtarget.cpp
@@ -15,6 +15,7 @@
#include "AMDGPUSubtarget.h"
#include "R600InstrInfo.h"
#include "SIInstrInfo.h"
+#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallString.h"
@@ -37,6 +38,8 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS) :
TexVTXClauseSize(0),
Gen(AMDGPUSubtarget::R600),
FP64(false),
+ FP64Denormals(false),
+ FP32Denormals(false),
CaymanISA(false),
EnableIRStructurizer(true),
EnablePromoteAlloca(false),
@@ -45,14 +48,27 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS) :
CFALUBug(false),
LocalMemorySize(0),
InstrItins(getInstrItineraryForCPU(GPU)) {
+ // On SI+, we want FP64 denormals to be on by default. FP32 denormals can be
+ // enabled, but some instructions do not respect them and they run at the
+ // double precision rate, so don't enable by default.
+ //
+ // We want to be able to turn these off, but making this a subtarget feature
+ // for SI has the unhelpful behavior that it unsets everything else if you
+ // disable it.
- SmallString<256> FullFS("+promote-alloca,");
+ SmallString<256> FullFS("+promote-alloca,+fp64-denormals,");
FullFS += FS;
ParseSubtargetFeatures(GPU, FullFS);
if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
InstrInfo.reset(new R600InstrInfo(*this));
+
+ // FIXME: I don't think think Evergreen has any useful support for
+ // denormals, but should be checked. Should we issue a warning somewhere if
+ // someone tries to enable these?
+ FP32Denormals = false;
+ FP64Denormals = false;
} else {
InstrInfo.reset(new SIInstrInfo(*this));
}
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