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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-18 17:13:57 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-18 17:13:57 +0000 |
| commit | 43160e7af2451111917b10348e5a8dabcd5f80d0 (patch) | |
| tree | 3b1e47f7ac2adae9d2b6c7172cf4a8de94f2404a /llvm/lib/Target/R600/AMDGPUISelLowering.cpp | |
| parent | dbc9aae1fba6ef3232c720314cb2430a678b36e5 (diff) | |
| download | bcm5719-llvm-43160e7af2451111917b10348e5a8dabcd5f80d0.tar.gz bcm5719-llvm-43160e7af2451111917b10348e5a8dabcd5f80d0.zip | |
R600/SI: Add intrinsics for brev instructions
llvm-svn: 211187
Diffstat (limited to 'llvm/lib/Target/R600/AMDGPUISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index 1e6f38ffc3f..ac5d7908781 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -900,6 +900,9 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, Op.getOperand(1), Op.getOperand(2)); + case AMDGPUIntrinsic::AMDGPU_brev: + return DAG.getNode(AMDGPUISD::BREV, DL, VT, Op.getOperand(1)); + case AMDGPUIntrinsic::AMDIL_exp: // Legacy name. return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1)); @@ -2026,6 +2029,7 @@ const char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const { NODE_NAME_CASE(BFE_I32) NODE_NAME_CASE(BFI) NODE_NAME_CASE(BFM) + NODE_NAME_CASE(BREV) NODE_NAME_CASE(MUL_U24) NODE_NAME_CASE(MUL_I24) NODE_NAME_CASE(MAD_U24) |
