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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-05-12 15:00:46 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-05-12 15:00:46 +0000 |
| commit | 2a9d94757f51ad304cff29d12a841618caa78d7d (patch) | |
| tree | 8c78285b3d1c9699e40cef21414a4cf05230c1c3 /llvm/lib/Target/R600/AMDGPUISelLowering.cpp | |
| parent | 369f3f44a6a358f54347a495ba32dc9a7e29b9d4 (diff) | |
| download | bcm5719-llvm-2a9d94757f51ad304cff29d12a841618caa78d7d.tar.gz bcm5719-llvm-2a9d94757f51ad304cff29d12a841618caa78d7d.zip | |
R600/SI: Remove explicit m0 operand from v_interp instructions
Instead add m0 as an implicit operand. This helps avoid spills
of the m0 register in some cases.
llvm-svn: 237140
Diffstat (limited to 'llvm/lib/Target/R600/AMDGPUISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index ceb7e151959..b304488142a 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -2678,6 +2678,9 @@ const char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const { NODE_NAME_CASE(CONST_DATA_PTR) case AMDGPUISD::FIRST_MEM_OPCODE_NUMBER: break; NODE_NAME_CASE(SENDMSG) + NODE_NAME_CASE(INTERP_MOV) + NODE_NAME_CASE(INTERP_P1) + NODE_NAME_CASE(INTERP_P2) NODE_NAME_CASE(STORE_MSKOR) NODE_NAME_CASE(TBUFFER_STORE_FORMAT) case AMDGPUISD::LAST_AMDGPU_ISD_NUMBER: break; |
