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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-06-14 04:26:07 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-06-14 04:26:07 +0000
commitb2e8744eeb80dd6d37caf0fdac3f92af618d2650 (patch)
tree0e7c3cf8656d937f68234dd4cdc4011b307b61b5 /llvm/lib/Target/R600/AMDGPUFrameLowering.cpp
parente682a19a1c07b1da406c2112dc44fc48c688da1c (diff)
downloadbcm5719-llvm-b2e8744eeb80dd6d37caf0fdac3f92af618d2650.tar.gz
bcm5719-llvm-b2e8744eeb80dd6d37caf0fdac3f92af618d2650.zip
Fix typo
llvm-svn: 210968
Diffstat (limited to 'llvm/lib/Target/R600/AMDGPUFrameLowering.cpp')
-rw-r--r--llvm/lib/Target/R600/AMDGPUFrameLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUFrameLowering.cpp b/llvm/lib/Target/R600/AMDGPUFrameLowering.cpp
index e7e90d3184d..9e8302ec0a1 100644
--- a/llvm/lib/Target/R600/AMDGPUFrameLowering.cpp
+++ b/llvm/lib/Target/R600/AMDGPUFrameLowering.cpp
@@ -83,7 +83,7 @@ int AMDGPUFrameLowering::getFrameIndexOffset(const MachineFunction &MF,
for (int i = MFI->getObjectIndexBegin(); i < UpperBound; ++i) {
OffsetBytes = RoundUpToAlignment(OffsetBytes, MFI->getObjectAlignment(i));
OffsetBytes += MFI->getObjectSize(i);
- // Each regiter holds 4 bytes, so we must always align the offset to at
+ // Each register holds 4 bytes, so we must always align the offset to at
// least 4 bytes, so that 2 frame objects won't share the same register.
OffsetBytes = RoundUpToAlignment(OffsetBytes, 4);
}
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